INTRA-MODE SEARCH FOR VIDEO ENCODING
Granted: January 31, 2013
Application Number:
20130028317
A search method for identifying an intra mode that can produce acceptable video-encoding quality for a pixel block while striking a proper balance between the quality and processor load. In a representative embodiment, the search method relies on a set of mode-selection rules for iteratively identifying candidate intra modes. Each identified candidate is evaluated based on a comparison of its sum of absolute differences (SAD) with the smallest SAD in the set of the previously identified…
ARCHITECTURE AND IMPLEMENTATION METHOD OF PROGRAMMABLE ARITHMETIC CONTROLLER FOR CRYPTOGRAPHIC APPLICATIONS
Granted: January 24, 2013
Application Number:
20130024668
An architecture includes a controller. The controller is configured to receive a microprogram. The microprogram is configured for performing at least one of hierarchical or a sequence of polynomial computations. The architecture also includes an arithmetic logic unit (ALU) communicably coupled to the controller. The ALU is controlled by the controller. Additionally, the microprogram is compiled prior to execution by the controller, the microprogram is compiled into a plurality of binary…
DYNAMIC STORAGE TIERING
Granted: January 24, 2013
Application Number:
20130024650
A method for dynamic storage tiering may include, but is not limited to: receiving an input/output (I/O) request from a host device; determining whether the I/O request results in a cache hit; and relocating data associated with the I/O request between a higher-performance storage device and lower-performance storage device according to the determination whether the data associated with the I/O request is stored in a cache.
MAGNETIC STORAGE DEVICE WITH CHIRPED WRITE HEAD DEGAUSSING WAVEFORM
Granted: January 24, 2013
Application Number:
20130021691
A circuit for use with a memory storage device including a magnetic storage medium and a write head operative to subject the magnetic storage medium to a magnetic field in response to an application of current to the write head, includes a write circuit operative to generate a write current supplied to the write head. The write current is characterized by a current waveform that reverses polarity in accordance with data to be stored on the magnetic medium. The circuit for use with the…
Voltage Level Translator Circuit for Reducing Jitter
Granted: January 24, 2013
Application Number:
20130021085
A voltage level translator circuit for translating an input signal referenced to a first voltage supply to an output signal referenced to a second voltage supply includes an input stage for receiving the input signal, the input stage including at least first and second nodes, a voltage at the second node being a logical complement of a voltage at the first node. A load circuit is coupled with the input stage, the load circuit being operative to at least temporarily store a signal at the…
METHODS AND STRUCTURE FOR SOURCE SYNCHRONOUS CIRCUIT IN A SYSTEM SYNCHRONOUS PLATFORM
Granted: January 24, 2013
Application Number:
20130021059
Methods and circuits in an application circuit to compensate for skew in the transmission of serial data between field programmable gate arrays (FPGAs) in the application circuit. A clock signal source external to both FPGAs generates a clock signal applied to both FPGAs. A transmitting FPGA generates a serial data stream comprising the current values of a plurality of signals within the transmitting FPGA and transmits the serial data stream based on its clock signal. The receiving FPGA…
BIT SLICE ROUND ROBIN ARBITER
Granted: January 17, 2013
Application Number:
20130019041
The present disclosure describes systems and methods for arbitrating between a plurality of devices competing for a system resource. Operations of the system and method may include, but are not limited to: initializing two or more previous grant request states; generating an access grant signal according to the two or more requests for access to the shared resource, two or more token states and the two or more previous grant request states; and generating an access grant signal according…
MEMORY DEVICE WITH TRIMMABLE POWER GATING CAPABILITIES
Granted: January 17, 2013
Application Number:
20130016573
A memory device includes at least one memory cell including a storage element electrically connected with a source potential line. A drive strength of the storage element is controlled as a function of a voltage level on the source potential line. The memory device further includes a clamp circuit electrically connected between the source potential line and a voltage source. The clamp circuit is operative to regulate the voltage level on the source potential line relative to the voltage…
DRIVE ENCLOSURES FOR TOOL-LESS REMOVABLE MOUNTING OF SOLID STATE DRIVES ONTO PRINTED CIRCUIT BOARD DEVICES
Granted: January 3, 2013
Application Number:
20130003320
Methods and systems for removably mounting a Solid State Drive (SSD) to a Printed Circuit Board (PCB) device without use of a tool. An exemplary system comprises a top portion and at least two flexible legs. Each leg comprises a vertical member attached to the top portion, and a tab for insertion into the PCB, the tab restricting the motion of the drive enclosure with respect to the PCB when inserted into the PCB, thereby allowing for removable attachment of the enclosure to the PCB…
METHODS AND SYSTEMS FOR IMPROVED MIORRORING OF DATA BETWEEN STORAGE CONTROLLERS USING BIDIRECTIONAL COMMUNICATIONS
Granted: January 3, 2013
Application Number:
20130007368
Methods and systems for improved transfer of mirrored information between paired dual-active storage controllers in a storage system using a SCSI transport layer. A first portion (approximately half) of the mirrored information transfers are performed in accordance with a first manner in which the controller to receive the mirrored information issues a read operation on the initiator-target nexus (ITN) of the SCSI transport layer to retrieve the mirrored information. A second portion…
METHODS AND APPARATUS FOR INCREASING STORAGE NETWORK PERFROMANCE BY MANAGING A LOGICAL VOLUME IN A STORAGE NETWORK SWITCHING COMPONENT
Granted: January 3, 2013
Application Number:
20130007334
Methods and apparatus for improved storage network performance by embedding logical volume control within a switching component of a storage network. An enhanced storage network switching component comprises a logical volume manager that aggregates a plurality of ports/PHYS of the switch (each coupled with a corresponding target storage device) to create and manage a logical volume. The manager exposes only a single port/PHY for access to the logical volume. Other ports/PHYs for the…
METHODS AND STRUCTURE FOR SELECTIVE PROPAGATION OF SAS BROADCAST(CHANGE) PRIMITIVES
Granted: January 3, 2013
Application Number:
20130007318
Methods and structure for improved configuration management of a storage system. A storage system comprises one or more storage controllers coupled with a plurality of storage components (e.g., storage devices and switching components). The coupling often comprises a switched fabric communication structure. Configuration changes normally propagated throughout the components of the networked storage system are prevented by detecting temporary changes in the configuration that are restored…
Impedance Mismatch Detection Circuit
Granted: January 3, 2013
Application Number:
20130002267
A comparison circuit for detecting impedance mismatch between pull-up and pull-down devices in a circuit to be monitored includes a comparator operative to receive first and second signals and to generate, as an output, a third signal indicative of a difference between the first and second signals. A first signal generator is operative to generate the first signal indicative of a difference between reference pull-up and pull-down currents that is scaled by a prescribed amount. The…
METHODS AND STRUCTURE FOR FIRMWARE UPGRADE OF DEVICES IN A STORAGE NETWORK
Granted: December 27, 2012
Application Number:
20120331181
Methods and systems for improved update of firmware for components in a storage system/network. A storage network comprising one or more initiator components coupled through one or more switching components to one or more target components may be updated by generating and distributing a package buffer comprising portions where each portion comprises firmware for a corresponding type of component. Switching and/or initiator components in the system locate a portion of the package buffer…
ADJUSTMENT OF NEGATIVE WEIGHTS IN WEIGHTED ROUND ROBIN SCHEDULING
Granted: December 27, 2012
Application Number:
20120327948
In one embodiment, a network processor services a plurality of queues having data using weighted round robin scheduling. Each queue is assigned an initial weight based on the queue's priority. During each cycle, an updated weight is generated for each queue by adding the corresponding initial weight to a corresponding previously generated decremented weight. Further, each queue outputs as many packets as it can without exceeding its updated weight. As each packet gets transmitted, the…
Hybrid Impedance Compensation in a Buffer Circuit
Granted: December 27, 2012
Application Number:
20120326768
A compensation circuit for controlling a variation in output impedance of at least one buffer circuit includes a monitor circuit and a control circuit coupled with the monitor circuit. The monitor circuit includes a pull-up portion including at least one PMOS transistor and a pull-down portion comprising at least one NMOS transistor. The monitor circuit is configured to track an operation of an output stage of the buffer circuit and is operative to generate at least a first control…
Current-Mode Logic Buffer with Enhanced Output Swing
Granted: December 27, 2012
Application Number:
20120326745
A differential buffer circuit having increased output voltage swing includes a differential input stage including at least first and second transistors, the first and second transistors being operative to receive first and second signals, respectively. The buffer circuit further includes a bias stage connected between the differential input stage and a first voltage source. The bias stage is operative to generate a quiescent current as a function of a third signal supplied to the bias…
Cache Replacement Using Active Cache Line Counters
Granted: December 20, 2012
Application Number:
20120324172
An apparatus for performing data caching comprises at least one cache memory including multiple cache lines arranged into multiple segments, each segment having a subset of the cache lines associated therewith. The apparatus further includes a first plurality of counters, each of the counters being operative to track a number of active cache lines associated with a corresponding one of the segments. At least one controller included in the apparatus is operative to receive information…
Turbo Parallel Concatenated Convolutional Code Implementation on Multiple-Issue Processor Cores
Granted: December 20, 2012
Application Number:
20120324316
An iterative PCCC encoder includes a first delay line operative to receive at least one input data sample and to generate a plurality of delayed samples as a function of the input data sample. The encoder further includes a second delay line including a plurality of delay elements connected in a series configuration. An input of a first one of the delay elements is adapted to receive a sum of first and second signals, the first signal generated as a sum of the input data sample and at…
SYSTEMS AND METHODS FOR TOOL-LESS RETRACTABLE STORAGE OF LENGTHS OF CABLE CHAIN
Granted: December 13, 2012
Application Number:
20120311990
Devices and systems for tool-less assembly of cable chains that are capable of being retractably stored. The device comprises a first contact element, a second contact element, and a lengthwise member. The first contact element is adapted for movable contact with a receiving member of a first cable chain segment. The second contact element is adapted for movable contact with a receiving member of a second cable chain segment. The lengthwise member is fixedly attached to the contact…
