FIRMWARE-DRIVEN MULTIPLE VIRTUAL SAS EXPANDERS ON A SINGLE EXPANDER HARDWARE COMPONENT
Granted: December 13, 2012
Application Number:
20120317324
The present invention is directed to a method for implementing firmware in an expander system in such a way that a single hardware component (ex.—a chip) of the expander system may be presented as multiple virtual expanders to both upstream connected devices (ex.—HBAs) as well as downstream connected devices (ex.—disk drives).
CONCURRENT RESPONSE FOR DEVICE INFORMATION DURING AN INITALIZATION PROCESS FOR A STORAGE DEVICE
Granted: December 13, 2012
Application Number:
20120317315
Methods operable on a storage controller and related structure are provided for responding to inquiry commands from a host for a storage device. A command requesting information about a storage device is received from a host. In response to the command, the storage controller determines that the storage device is not initialized, and begins an initialization process for the storage device. Information received from the storage device during the initialization process is stored for…
Techniques for increasing a lifetime of blocks of memory
Granted: December 6, 2012
Application Number:
20120311378
Techniques are described for increasing a lifetime of blocks of memory. In operation, respective life expectancy scores for each of the blocks are calculated based at least in part on a respective number of times each of the blocks is respectively erased, and further based at least in part on at least one other factor that affects the lifetime of the blocks. An order to write and recycle the blocks is determined, based at least in part on at least some of the respective lifetime…
STORAGE DEVICE CARRIERS FOR ADAPTING A STORAGE DEVICE OF A FIRST SIZE TO A SLOT FOR A STORAGE DEVICE OF A SECOND SIZE
Granted: November 29, 2012
Application Number:
20120299453
Apparatus and devices for carrying a storage device and adapting it to a slot for a storage device having a different form factor. The system comprises an opening means for elastically deforming a shape of the system from an original shape so that the carrier may receive the storage device. The system also comprises restraining means for constraining the motion of the storage device within the system when the system returns to the original shape. Furthermore, the system comprises a…
TRANSMITTING INTERNET PROTOCOL OVER SCSI IN A HIGH AVAILABILITY CLUSTER
Granted: November 29, 2012
Application Number:
20120303701
A system may include information handling system devices connected together to form a computing cluster utilizing a SCSI interface. Each one of the information handling system devices may include an operating system kernel having a SCSI networking module for encapsulating Internet Protocol (IP) packets for transmitting between the information handling system devices. The system may also include SCSI hardware for connecting the information handling system devices together. The SCSI…
SYSTEMS AND METHODS FOR ADVANCED INTERRUPT SCHEDULING AND PRIORITY PROCESSING IN A STORAGE SYSTEM ENVIRONMENT
Granted: November 29, 2012
Application Number:
20120303850
Methods and systems for advanced interrupt processing and scheduling are provided. The system comprises a memory operable to store interrupt priorities, an interface, and a processor operable to acquire incoming interrupts and to handle the incoming interrupts according to the interrupt priorities. The processor is also operable to receive interrupt processing criteria from the interface (sent, for example, from a device not directly coupled with the system), and to modify the interrupt…
TRANSPORT AGNOSTIC SCSI I/O REFERRALS
Granted: November 29, 2012
Application Number:
20120303894
The present invention is a method for providing multi-pathing via Small Computer System Interface Input/Output (SCSI I/O) referral between an initiator and a storage cluster which are communicatively coupled via a network. The method includes receiving an input/output (I/O) at a first target device from the initiator via the network. The I/O includes a data request. The method further includes transmitting a SCSI I/O referral list to the initiator when data included in the data request…
Power Mesh for Multiple Frequency Operation of Semiconductor Products
Granted: November 29, 2012
Application Number:
20120304141
A semiconductor platform for implementing multiple-frequency operations includes multiple physical resources comprising embedded functions and a configurable transistor fabric. The transistor fabric includes at least first and second portions, the first portion being programmable to instantiate a first function having higher frequency operations than the second portion. The platform further includes multiple logical resources corresponding to the physical resources of the semiconductor…
SYSTEM FOR A MULTI-TENANT STORAGE ARRAY VIA DOMAINS HOSTED ON A VIRTUAL MACHINE
Granted: November 22, 2012
Application Number:
20120297381
A system for managing a storage array having a set of storage components comprises a storage array controller, the storage array controller including: a first instance of a controller firmware on a virtual machine in a privileged domain, the privileged domain having access to hardware of the storage array; and a second instance of the controller firmware on a separate virtual machine in a first non-privileged array domain. The privileged domain is configured to inspect an I/O request and…
METHODS AND SYSTEMS OF DISTRIBUTING RAID IO LOAD ACROSS MULTIPLE PROCESSORS
Granted: November 22, 2012
Application Number:
20120297133
A method for distributing IO load in a RAID storage system is disclosed. The RAID storage system may include a plurality of RAID volumes and a plurality of processors. The IO load distribution method may include determining whether the RAID storage system is operating in a write-through mode or a write-back mode; distributing the IO load to a particular processor selected among the plurality of processors when the RAID storage system is operating in the write-through mode, the particular…
COMPENSATING FOR JITTER DURING DDR3 MEMORY DELAY LINE TRAINING
Granted: November 22, 2012
Application Number:
20120296598
A method for compensating for jitter during DDR3 delay line training may include using a computer or processor to perform the steps of executing a plurality of tests for each one of a plurality of delay values for an interconnect delay between a Double-Data-Rate Three (DDR3) memory controller and a DDR3 Synchronous Dynamic Random Access Memory (SDRAM); accumulating a plurality of test results for each plurality of tests for each one of the plurality of delay values; determining a…
METHODS AND APPARATUS FOR PSEUDO ASYNCHRONOUS TESTING OF RECEIVE PATH IN SERIALIZER/DESERIALIZER DEVICES
Granted: November 15, 2012
Application Number:
20120287983
Methods and apparatus are provided for pseudo asynchronous testing of receive paths in serializer/deserializer (SerDes) devices. A SerDes device is tested by applying a source of serial data to a receive path of the SerDes device during a test mode. The receive path substantially aligns to incoming data using a bit clock. A phase is adjusted during the test mode of the bit clock relative to the source of serial data to evaluate the SerDes device. The source of serial data may be, for…
Multi-Zone Chuck
Granted: November 15, 2012
Application Number:
20120288643
A method for affecting film growth on a substrate during a deposition process includes steps of: applying a first voltage or current to a first zone of a chuck adapted to hold the substrate in position, the film growth on at least a portion of the substrate proximate the first zone being affected as a function of a level of the first voltage or current; and applying a second voltage or current to a second zone of the chuck, the film growth on at least a portion of the substrate proximate…
ROUTE LOOKUP METHOD FOR REDUCING OVERALL CONNECTION LATENCIES IN SAS EXPANDERS
Granted: November 15, 2012
Application Number:
20120290762
A system and method for reducing overall connection latencies in a SAS expander is disclosed. The SAS expander includes a plurality of ports and a route lookup table configured for providing a central resource for routing information for the ports. The SAS expander also includes a plurality of connection history caches (CHCs) associated with the ports, each CHC is configured for storing at least one successfully established connection record. Upon receiving a connection request at a…
PREFERENTIALLY ACCELERATING APPLICATIONS IN A MULTI-TENANT STORAGE SYSTEM VIA UTILITY DRIVEN DATA CACHING
Granted: November 15, 2012
Application Number:
20120290789
A system may include multi-tenant electronic storage for hosting a plurality of applications having heterogeneous Input/Output (I/O) characteristics, relative importance levels, and Service-Level Objectives (SLOs). The system may also include a management interface for managing the multi-tenant electronic storage, where the management interface is configured to receive a storage resource arbitration policy based on at least one of a workload type, an SLO, or a priority for an…
METHODS AND STRUCTURE FOR STORING ERRORS FOR ERROR RECOVERY IN A HARDWARE CONTROLLER
Granted: November 15, 2012
Application Number:
20120290875
Methods and structure for providing methods and structure for recovering errors in a hardware controller after an overwrite event, such as the detection of another error. In this regard, a link layer of the hardware controller is configured with a register that persistently stores errors until a processor can address them. The link layer is adapted to establish a connection between an initiator and a target and detect errors associated with the connection. As each detected error is…
SYSTEM AND METHOD FOR OPTIMIZING READ-MODIFY-WRITE OPERATIONS IN A RAID 6 VOLUME
Granted: November 15, 2012
Application Number:
20120290905
A method is disclosed for updating parity information in a RAID 6 system wherein only one parity block is read during each write operation. Both parity blocks may be updated from the new data, the data being overwritten and either of the old blocks of parity information. A method for load balancing in a RAID 6 system using this method is also disclosed.
TOTAL POWER OPTIMIZATION FOR A LOGIC INTEGRATED CIRCUIT
Granted: November 15, 2012
Application Number:
20120290994
A method of reducing total power dissipation for logic cells includes selecting a distribution of logic cells corresponding to at least one path, computing a dynamic to static power ratio for each logic cell in the distribution of logic cells and ranking the dynamic to static power ratio for each logic cell into a lower group, a middle group and an upper group of logic cells. Additionally, the method includes swapping the lower group of logic cells and the upper group of logic cells for…
METHOD AND SYSTEM FOR FIRMWARE UPGRADE OF A STORAGE SUBSYSTEM HOSTED IN A STORAGE VIRTUALIZATION ENVIRONMENT
Granted: November 15, 2012
Application Number:
20120291021
A method and controller device for upgrading firmware in a virtualized storage environment having a virtual machine manager, guest virtual machines and a storage device. The method includes downloading a new firmware solution bundle to a first logical area of the storage device, and installing the new firmware containing the virtual machine manager and guest virtual machines. The installation includes moving the solution bundle to a scratch area carved out of a P-cache area in the…
SOLDERING METHOD AND RELATED DEVICE FOR IMPROVED RESISTANCE TO BRITTLE FRACTURE
Granted: November 8, 2012
Application Number:
20120280023
A lead-free solder joint is formed between a tin-silver-copper solder alloy (SAC), SACX, or other commonly used Pb-free solder alloys, and a metallization layer of a substrate. Interaction of the SAC with the metallization layer forms an intermetallic compound (IMC) that binds the solder mass to the metallization layer. The IMC region is substantially free of any phosphorous-containing layers or regions.
