SYSTEMS AND METHODS FOR BOOTING A BOOTABLE VIRTUAL STORAGE APPLIANCE ON A VIRTUALIZED SERVER PLATFORM
Granted: June 30, 2011
Application Number:
20110161649
One embodiment is a method for booting a bootable virtual storage appliance on a virtualized server platform. One such method comprises: providing a virtual storage appliance on a server platform, the virtual storage appliance configured to manage a disk array comprising a plurality of disks, and wherein at least one of the disks comprises a hidden boot partition having a boot console; powering up the server platform; loading boot code on the server platform; loading the boot console…
Methods and Apparatus for Programming Multiple Program Values Per Signal Level in Flash Memories
Granted: June 16, 2011
Application Number:
20110141808
Methods and apparatus are provided for programming multiple program values per signal level in flash memories. A flash memory device having a plurality of program values is programmed by programming the flash memory device for a given signal level, wherein the programming step comprises a programming phase and a plurality of verify phases. In another variation, a flash memory device having a plurality of program values is programmed, and the programming step comprises a programming phase…
METHODS AND APPARATUS FOR DISTRIBUTION OF RAID STORAGE MANAGEMENT OVER A SAS DOMAIN
Granted: June 16, 2011
Application Number:
20110145452
Methods and apparatus for distributing Redundant Array of Independent Disks (RAID) storage management to one or more Serial Attached SCSI (SAS) expanders in a SAS domain. A RAID set comprises a set of one or more SAS expanders coupled to communicate with one another to process I/O requests directed to a RAID logical volume of the RAID set. The RAID logical volume is distributed over portions of each of multiple storage devices. Each SAS expander of the RAID set is coupled to one or more…
Methods and Apparatus for Soft Demapping and Intercell Interference Mitigation in Flash Memories
Granted: June 16, 2011
Application Number:
20110145487
Methods and apparatus are provided for soft demapping and intercell interference mitigation in flash memories. In one variation, a target cell in a flash memory device capable of storing at least two data levels, s, per cell is read by obtaining a measured read value, r, for at least one target cell in the flash memory; obtaining a value, h, representing data stored for at least one aggressor cell in the flash memory; selecting one or more probability density functions based on a pattern…
MATRIX-VECTOR MULTIPLICATION FOR ERROR-CORRECTION ENCODING AND THE LIKE
Granted: June 2, 2011
Application Number:
20110131462
In one embodiment, a matrix-vector multiplication (MVM) component generates a product vector based on (i) an input matrix and (ii) an input vector. The MVM component has a permuter, memory, and an XOR gate array. The permuter permutates, for each input sub-vector of the input vector, the input sub-vector based on a set of permutation coefficients to generate a set of permuted input sub-vectors. The memory stores a set of intermediate product sub-vectors corresponding to the product…
FORWARD SUBSTITUTION FOR ERROR-CORRECTION ENCODING AND THE LIKE
Granted: June 2, 2011
Application Number:
20110131463
In one embodiment, a forward substitution component performs forward substitution based on a lower-triangular matrix and an input vector to generate an output vector. The forward substitution component has memory, a first permuter, an XOR gate array, and a second permuter. The memory stores output sub-vectors of the output vector. The first permuter permutates one or more previously generated output sub-vectors stored in the memory based on one or more permutation coefficients…
CONTROLLING A CALL SETUP PROCESS
Granted: May 26, 2011
Application Number:
20110123012
A call setup process (28) in a telecommunication device (10) is controlled, wherein the telecommunication device (10) receives a user command (22) to set up a call, initiates the call setup process (28), determines that the call is likely to reach a voicemail system (14), and, in response to the determination that the call is likely to reach the voicemail system (14), automatically terminates the call setup process (28). A telecommunication device (10) comprises related features. A…
ROM LIST-DECODING OF NEAR CODEWORDS
Granted: May 26, 2011
Application Number:
20110126075
Certain embodiments of the present invention are methods for the organization of trapping-set profiles in ROM and for the searching of those profiles during (LDPC) list decoding. Profiles are ranked by dominance, i.e., by their impact on the error-floor characteristics of a decoder. More-dominant trapping-set profiles contain information about both unsatisfied check nodes (USCs) and mis-satisfied check nodes (MSCs), while less-dominant trapping-set profiles contain information about only…
SUBWORDS CODING USING DIFFERENT INTERLEAVING SCHEMES
Granted: May 19, 2011
Application Number:
20110119056
In a communications system that demultiplexes user data words into multiple sub-words for encoding and decoding within different subword-processing paths, the minimum distance between bit errors in an extrinsic codeword can be increased by having corresponding interleavers/deinterleavers in the different subword-processing paths use different interleaving/deinterleaving algorithms.
SUBWORDS CODING USING DIFFERENT ENCODING/DECODING MATRICES
Granted: May 19, 2011
Application Number:
20110119553
In a communications system that demultiplexes user data words into multiple sub-words for encoding and decoding within different subword-processing paths, the minimum distance between bit errors in an extrinsic codeword can be increased by having corresponding subword encoders/decoders in the different subword-processing paths perform subword encoding/decoding with different encoder/decoder matrices.
BACK-OFF RETRY WITH PRIORITY ROUTING
Granted: May 12, 2011
Application Number:
20110113176
A method for back-off retry with priority routing in a single, cohesive SAS expander includes routing a data transfer between an input of a single, cohesive SAS expander and an output of the single, cohesive SAS expander, wherein the single, cohesive expander includes a first SAS expander, and at least one additional SAS expander via at least one inter-expander link (IEL). The routing of data may further include routing a first OPEN request on a direct path through the first SAS expander…
BIAS VOLTAGE GENERATION TO PROTECT INPUT/OUTPUT (IO) CIRCUITS DURING A FAILSAFE OPERATION AND A TOLERANT OPERATION
Granted: May 5, 2011
Application Number:
20110102048
A method includes controllably generating a first bias voltage from a supply voltage to be within an upper tolerable limit of an operating voltage of one or more constituent active circuit element(s) of an Input/Output (IO) core device of an integrated circuit (IC) to be interfaced with an IO pad, and controllably generating a second bias voltage from an external voltage supplied through the IO pad to be within the upper tolerable limit of the operating voltage of the one or more…
APPARATUS AND METHODS FOR IMPROVED HIGH-SPEED COMMUNICATION SYSTEMS
Granted: May 5, 2011
Application Number:
20110103439
Apparatus and methods for improved high-speed communication by exchanging low-speed information regarding the high-speed exchanges over the same communication medium. In one exemplary embodiment, a communication device includes a high-speed transceiver adapted to exchange high-speed data with another device via a communication medium using high-frequency signals. The device also includes a low-speed component adapted to exchange low-speed information over the same communication medium as…
Phase Detector For Timing Recovery Loop
Granted: May 5, 2011
Application Number:
20110103527
In one embodiment, a (hard-drive) read channel has a phase detector used in a timing recovery loop. The phase detector utilizes the sign bit and confidence value from a received log-likelihood ratio (LLR) signal to generate a mean value. The mean value is convolved with a partial response target to generate an estimated timing error signal. When implemented in a hard-drive read channel, the phase detector allows for timing recovery with lower loss-of-lock rates.
METHODS AND APPARATUS FOR INTERCONNECTING SAS/SATA DEVICES USING EITHER ELECTRICAL OR OPTICAL TRANSCEIVERS
Granted: May 5, 2011
Application Number:
20110106997
Methods and apparatus for interconnecting Serial Attached SCSI (SAS) or Serial Advanced Technology Attachment (SATA) devices using either an electrical communication medium or an optical communication medium. Each device includes an out of band (OOB) encoder/decoder (endec) logic component to translate between standard OOB signals used by the devices and digitally encoded OOB signals exchanged over the communication medium. Thus the devices may be coupled using either optical or…
METHODS AND APPARATUS FOR LOAD-BASED POWER MANAGEMENT IN A STORAGE SYSTEM
Granted: May 5, 2011
Application Number:
20110107129
Apparatus and method for managing power consumption of circuits within a Serial Attached SCSI (SAS) device. A SAS device having a plurality of PHY logic circuits includes a queue manager and a power manager. The queue manager is operable to determine a current workload based on queued entries for the plurality of PHY logic circuits. Based on the current workload, the power manager is operable to set identified ones of the plurality of PHY logic circuits into a low power mode. In some…
Low Complexity LDPC Encoding Algorithm
Granted: April 28, 2011
Application Number:
20110099454
A method of encoding a binary source message u, by calculating x:=Au, calculating y:=B?x, resolving the equation Dp=y for p, and incorporating u and p to produce an encoded binary message v, where A is a matrix formed only of permutation sub matrices, B? is a matrix formed only of circulant permutation sub matrices, and D is a matrix of the form D = ( T 0 … 0 0 0 T … 0 0 … … … … … 0 0 … T 0 I I … I I ) …
METHOD AND SYSTEM FOR PROVIDING A CUSTOMIZED STORAGE CONTAINER
Granted: April 14, 2011
Application Number:
20110083992
A method and system for providing a customized storage container includes a generally rectangular housing and at least one printed circuit board contained within the rectangular housing. The customized storage container encloses a first row of interconnector modules that are positioned adjacent to a first, open end of the rectangular housing. The customized storage container also encloses a second row of interconnector modules positioned adjacent to the first, open end of the rectangular…
ADJUSTABLE HOLD FLIP FLOP AND METHOD FOR ADJUSTING HOLD REQUIREMENTS
Granted: April 14, 2011
Application Number:
20110084726
A method and apparatus are provided for storing a value in a process register of an electrical circuit, which indicates a strength of a process in which the circuit was fabricated, and adjusting an input delay applied to data signals received by a synchronous storage element of the electrical circuit based on the stored value.
Automatic Filter-Reset Mechanism
Granted: March 31, 2011
Application Number:
20110075718
In one embodiment, a (hard-drive) read channel has a (DFIR equalization) filter, whose tap coefficients are adaptively updated. A reset controller monitors an (LLR) signal generated downstream of the filter to automatically determine when to reset the filter, e.g., by reloading an initial set of user-specified tap coefficients. For LLR values, the reset controller determines to reset the filter when the reset controller detects that too many recent LLR values have confidence values that…
