NFA character class matching
Granted: November 25, 2014
Patent Number:
8898094
Disclosed is method of matching a character class to a symbol of an input stream. A character class, or a plurality of character classes, is defined into an accessible format which when accessed is compared to a symbol in an input stream. The format may be stored in an NFA array cell or it may be broadcast to the cell array with an input symbol for comparison.
Correcting errors in miscorrected codewords using list decoding
Granted: November 25, 2014
Patent Number:
8898539
A receive path of a communications system comprises an error-correction decoder, an error-detection decoder, and a codeword adjuster. The error-correction decoder performs error-correction decoding on a received codeword to generate a valid codeword. The error-detection decoder performs error-detection decoding on the valid codeword to determine whether or not the valid codeword is the correct codeword that was transmitted. If the valid codeword is not the correct codeword, then the…
At-speed scan testing of clock divider logic in a clock module of an integrated circuit
Granted: November 25, 2014
Patent Number:
8898527
An integrated circuit comprises scan test circuitry and additional circuitry subject to testing utilizing the scan test circuitry. The scan test circuitry comprises a scan chain having a plurality of scan cells. The integrated circuit further comprises a clock distribution network configured to provide clock signals to respective portions of the integrated circuit. The clock distribution network comprises at least one clock module comprising one or more clock dividers and associated…
Methods and structure for hardware serial advanced technology attachment (SATA) error recovery in a serial attached SCSI (SAS) expander
Granted: November 25, 2014
Patent Number:
8898506
Methods and structure for enhanced SAS expander functionality to store and forward buffered information transmitted from an initiator device to a target device and to process errors in control circuits of the expander without intervention from the general purpose programmable processor of the expander. A PHY of an expander is associated with control circuits that comprise buffering of commands to be forwarded to an end device directly coupled to the PHY. The control circuits locally…
Methods and structure for load balancing of background tasks between storage controllers in a clustered storage environment
Granted: November 25, 2014
Patent Number:
8898385
Methods and structure for load balancing of background tasks between storage controllers are provided. An exemplary active storage controller comprises a front-end interface that receives host Input/Output (I/O) requests directed to a logical volume, a back-end interface that couples with one or more of storage devices provisioning the logical volume, and a control unit. The control unit processes the host I/O requests directed to the logical volume, identifies a background processing…
Memory efficient check of raid information
Granted: November 25, 2014
Patent Number:
8898380
Disclosed is a RAID data checking system. I/O controllers to read data RAID data from the storage devices and transfer that data to virtual memory address ranges. The P+Q checking function receives the data sent to the virtual memory address ranges. However, instead of storing the incoming data, the P+Q checking function updates intermediate values of the P and Q redundant data calculations associated with the incoming data. When all of the strips have been received, the P+Q checking…
Accessing logical-to-physical address translation data for solid state disks
Granted: November 25, 2014
Patent Number:
8898371
Described embodiments provide a media controller for a storage device having sectors, the sectors organized into blocks and superblocks. The media controller stores, on the storage device, logical-to-physical address translation data in N summary pages, where N corresponds to the number of superblocks of the storage device. A buffer layer module of the media controller initializes a summary page cache in a buffer. The summary page cache has space for M summary page entries, where M is…
Systems and methods for advanced interrupt scheduling and priority processing in a storage system environment
Granted: November 25, 2014
Patent Number:
8898361
Methods and systems for advanced interrupt processing and scheduling are provided. The system comprises a memory operable to store interrupt priorities, an interface, and a processor operable to acquire incoming interrupts and to handle the incoming interrupts according to the interrupt priorities. The processor is also operable to receive interrupt processing criteria from the interface (sent, for example, from a device not directly coupled with the system), and to modify the interrupt…
Methods and structure enhancing zone configuration in a serial attached SCSI environment
Granted: November 25, 2014
Patent Number:
8898342
Methods and structure are provided for enhancing zone configuration processes in a Serial Attached SCSI (SAS) architecture. The method includes embedding, at a SAS initiator, a ZONE UNLOCK request within a Serial Management Protocol (SMP) ZONE ACTIVATE command. The method also comprises transmitting the SMP ZONE ACTIVATE command to a SAS expander, and receiving, at the SAS expander, the SMP ZONE ACTIVATE command. Further, the method includes detecting, at the SAS expander, the ZONE…
Method and apparatus to perform floating point operations
Granted: November 25, 2014
Patent Number:
8898214
A method of subtracting floating-point numbers includes determining whether a first sign associated with a first floating-point number is unequal to a second sign associated with a second floating-point number, determining whether a first exponent associated with the first floating-point number is less than a second exponent associated with the second floating-point number, negating a first mantissa associated with the first floating-point number when the first sign is unequal to the…
Crest factor reduction (CFR) using asymmetrical pulses
Granted: November 25, 2014
Patent Number:
8897388
Crest factor reduction (CFR) techniques are provided using asymmetrical pulses. A crest factor reduction method comprises obtaining one or more data samples; detecting at least one peak in the one or more data samples; performing peak cancellation on the at least one detected peak by applying an asymmetric cancellation pulse to the at least one detected peak; and providing processed versions of the one or more data samples. The asymmetric cancellation pulse is generated, for example, by…
Method for selecting an element of a user interface and device implementing such a method
Granted: November 18, 2014
Patent Number:
8893051
A method for selecting at least one element of a user interface on an electronic unit, including a step during which an action of an initialisation tool, positioned into an initialisation position on the user interface on the unit, triggers a display of a virtual magnifier encompassing the initialization position; and then a step during which an action of a validation tool triggers a display in the magnifier of a cursor centered on the initialization position; and then a step during…
Methods and apparatus for soft data generation for memory devices using decoder performance feedback
Granted: November 18, 2014
Patent Number:
8892966
Methods and apparatus for soft data generation for memory devices using decoder performance feedback. At least one soft data value is generated in a memory device, by obtaining performance feedback from a decoder; obtaining an error statistic based on the performance feedback; and generating the at least one soft data value based on the obtained error statistic. The performance feedback comprises one or more of decoded bits, a number of erroneous bits based on data decoded by the decoder…
Methods and apparatus for packing received frames in buffers in a serial attached SCSI (SAS) device
Granted: November 18, 2014
Patent Number:
8892787
Methods and apparatus for packing received Serial Attached SCSI (SAS) frames in buffers for transmission to a host system memory. SAS frames are received from another SAS device and stored in a frame buffer memory. User data in the received frames has appended SCSI Data Integrity Fields (DIF information) to enhance reliability. Features and aspects hereof use the DIF information to validate the user data and then strip the DIF information to densely pack the validated user data in a DMA…
Implementation of negation in a multiplication operation without post-incrementation
Granted: November 18, 2014
Patent Number:
8892621
A multiplier circuit for generating a product of at least first and second multiplicands includes encoding circuitry comprising a plurality of encoders. Each of the encoders is operative to receive at least a subset of bits of the first multiplicand and to generate a partial product corresponding to the subset of bits of the first multiplicand. The encoding circuitry is further operative to incorporate a negation of the product as a function of at least a first control signal supplied to…
Document management with verifiable time-of-archive capability
Granted: November 18, 2014
Patent Number:
8892532
A document archiving and retrieval system enables third parties to verify that an electronic document had been archived on a particular date and time. For each document to be archived, a hash function generates a digital fingerprint of the document, and inserts it into a hash list file, together with an indicator of the location of the file in the archive. The hash list file is submitted to an electronic time stamping authority to obtain a corresponding digital time stamp. Upon request,…
System and method for key wrapping to allow secure access to media by multiple authorities with modifiable permissions
Granted: November 18, 2014
Patent Number:
8891773
Aspects of the disclosure pertain to a system and method for key wrapping via a storage system to allow secure access to media of the system by multiple authorities with modifiable permissions. The keys used to encrypt ranges of the drive are not stored in plaintext and are recoverable using the credentials of an administrator or user with access to that particular range. An outside attacker cannot recover these keys and a malicious user can only recover the keys to the ranges that user…
Stub-tuned wirebond package
Granted: November 18, 2014
Patent Number:
8890638
An apparatus, system and method are described for impedance matching between a semiconductor package and a load on a board. In one embodiment of the present invention, a package trace is provided with an array of stubs that is designed to provide capacitance to the trace in order to more effectively match a wirebond. This improved match results in improvements in return loss, especially in higher speed applications such as broadband. Design parameters such as the width and length of each…
System and method for decreasing signal integrity noise by using varying drive strengths based on likelihood of signals becoming victims
Granted: November 18, 2014
Patent Number:
8890564
A method of designing an integrated circuit, integrated circuits using different drive strengths and a signal integrity monitor are provide herein. In one embodiment, the signal integrity monitor includes: (1) a signal interface configured to receive a signal from a parallel data bus for transmission over a plurality of signal paths and (2) a victim signal identifier configured to dynamically determine a potential victim signal path of the plurality of signal paths.
Systems and methods for short media defect detection
Granted: November 11, 2014
Patent Number:
8887034
Various embodiments of the present invention provide systems and methods for media defect detection. As an example, a data processing circuit is disclosed that includes a defect detector circuit and a comparator circuit. The defect detector circuit is operable to calculate a correlation value combining at least three of a data input derived from a medium, a detector extrinsic output, a detector intrinsic output and a decoder output. The comparator circuit is operable to compare the…