VOLTAGE REGULATION SYSTEM
Granted: November 27, 2008
Application Number:
20080290849
A voltage regulation system is provided including detecting a feedback voltage less than a reference voltage; asserting a current source gate output by the feedback voltage less than the reference voltage; activating a gated current source by the current source gate output; and waiting a delay interval before negating the current source gate output for turning off the gated current source.
NPN DEVICE AND METHOD OF MANUFACTURING THE SAME
Granted: November 27, 2008
Application Number:
20080290464
A method of forming a semiconductor device is disclosed. The method includes providing a floor for a semiconductor device by utilizing a CMOS process. The method further includes providing a BiCMOS-like process on top of the floor to further fabricate the semiconductor device, wherein the BiCMOS-like process and the CMOS process provides the semiconductor device.
Demodulator with Multiple Operating Modes for Amplitude Shift Keyed Signals
Granted: October 16, 2008
Application Number:
20080252367
A demodulator for demodulating an amplified shift keyed (ASK) signal includes an envelope detector generating an envelope signal, a low-pass filter generating a filtered envelope signal, a switch coupled to disengage the low-pass filter in response to a first control signal, a comparator with hysteresis comparing the envelope signal and the filtered envelope signal. In operation, the switch is open or close in response to the first control signal to cause the demodulator to operate in…
Superheterodyne Receiver with Switchable Local Oscillator Frequency and Reconfigurable IF Filter Characteristics
Granted: October 9, 2008
Application Number:
20080248765
An integrated circuit RF receiver processes multiple RF frequencies without internally changing the local oscillator to receive the multiple signals. No front-end tuner is used. In one embodiment, multiple crystals are connected to pins of the IC. A switch within the IC, controlled by a switch signal, selects one of the crystals as a reference frequency, depending on the frequency of the RF signal desired to be received. The selected reference frequency is applied to an RF synthesizer (a…
High Voltage Metal-On-Passivation Capacitor
Granted: August 7, 2008
Application Number:
20080185682
A capacitor is formed in an integrated circuit where the integrated circuit is fabricated using a fabrication process having multiple metal layers with the topmost metal layer being passivated by a passivation layer. The capacitor includes a first metal pad formed underneath the passivation layer using the topmost metal layer of the integrated circuit where the first metal pad forming the first conductive plate of the capacitor, and a second metal pad formed on the top of the passivation…
LDO Regulator with Ground Connection Through Package Bottom
Granted: June 12, 2008
Application Number:
20080135994
A low dropout (LDO) regulator device includes an LDO regulator integrated circuit housed in a 4-pin quad flat no-lead (QFN) package where the exposed die paddle is used as the ground terminal. The LDO regulator integrated circuit is formed on a semiconductor substrate. The 4-pin QFN package includes four perimeter lands connected to the input terminal, the output terminal, the enable terminal and the bypass terminal of the LDO regulator integrated circuit. The die paddle is to be…
Dual Input Prioritized LDO Regulator
Granted: May 29, 2008
Application Number:
20080122416
An LDO regulator includes two linear regulator circuits and an internal priority logic scheme that favors generating a regulated output voltage using a regulated supply voltage over an unregulated supply voltage. The unregulated supply voltage is applied to a first input terminal from a raw voltage source. The regulated supply voltage is applied to a second input terminal from, for example, a switching (e.g., BUCK) regulator. Two output devices are respectively connected between the…
Extending the Voltage Operating Range of Boost Regulators
Granted: May 29, 2008
Application Number:
20080122417
One embodiment of the invention is a hybrid boost regulator that includes a conventional boost regulator chip that operates when its input voltage is above 2.5 volts and a pre-boost circuit that operates when its input voltage is above 1 volt. A single 1.5 volt battery may be used to power the hybrid boost regulator. The pre-boost circuit is connected to the voltage input terminal of the boost regulator chip. The pre-boost circuit boosts the battery voltage (e.g., 1.5 v) at an output…
Hot-Swap Power Controller Generating Sequenced Power-Good Signals
Granted: May 29, 2008
Application Number:
20080126814
A power controller system is described herein, where a power-good signal (PWRGD) is asserted followed by a slightly delayed power-good signal (DLY_PWRGD) upon the system powering up. This PWRGD signal indicates that good power is being supplied to the card or other equipment, and the delayed signal tells a system processor that it is now ok to communicate with the card or other equipment. This delay allows the card or other equipment to reach a steady state condition before being…
Bandgap Reference Circuits With Isolated Trim Elements
Granted: May 22, 2008
Application Number:
20080116874
A bandgap reference circuit utilizes differential transistors to generate a temperature-independent bandgap voltage. In place of conventional trim elements that are connected in parallel to and adjust the resistance values of the bandgap reference circuit, current control circuits are placed in the current paths passing through the differential transistors (i.e., connected to the critical nodes located at the terminals of the differential transistors). Each current control circuit…
METHOD FOR FABRICATING NON-VOLATILE MEMORY CELLS
Granted: May 8, 2008
Application Number:
20080108192
A method for fabricating non-volatile memory cells is provided. The method includes providing a substrate, forming a first dopant region in the substrate, forming a second dopant region in the first dopant region, growing a first isolation region over a first portion of the substrate, the first dopant region, and the second dopant region, growing a second isolation region over a second portion of the substrate, the first dopant region, and the second dopant region, defining a contact…
Constant On-Time Regulator With Increased Maximum Duty Cycle
Granted: April 17, 2008
Application Number:
20080088284
A buck switching regulator receives an input voltage and provides a switching output voltage on a switch output node using a minimum on-time, variable off-time feedback control loop. The buck switching regulator includes an on-time control circuit for generating a first signal for turning off the high-side switch at the expiration of a first on-time duration or at the expiration of a maximum on-time. The first on-time duration is at least a minimum on-time and is allowed to expand to a…
Constant On-Time Regulator With Internal Ripple Generation and Improved Output Voltage Accuracy
Granted: April 17, 2008
Application Number:
20080088292
A buck switching regulator formed on an integrated circuit receives an input voltage and provides a switching output voltage on a switch output node using a constant on-time, variable off-time feedback control loop. The buck switching regulator includes an amplifier comparing a feedback voltage to a reference voltage and generating an output voltage on an output terminal, a first capacitor and a first resistor connected in series between the switch output node and the output terminal of…
Ripple Generation In Buck Regulator Using Fixed On-Time Control To Enable The Use of Output Capacitor Having Any ESR
Granted: March 13, 2008
Application Number:
20080061750
A buck switching regulator formed on an integrated circuit and receives an input voltage and provides a switching output voltage on a switch output node using a fixed on-time, minimum off-time feedback control scheme. The buck switching regulator includes a first capacitor and a first resistor formed on the integrated circuit where the first capacitor and the first resistor are connected in series between the switch output node and a feedback voltage node, and a second capacitor coupled…
Parallel Analog and Digital Timers in Power Controller Circuit Breaker
Granted: March 6, 2008
Application Number:
20080055808
A circuit breaker for a power controller integrated circuit is described where an analog timer and a digital timer are provided in parallel. The digital timer provides a fixed, on-chip maximum delay during an overcurrent condition to ensure the transistor will not be damaged. The analog timer allows the user to select an external capacitor or resistor to provide a delay time that is shorter than the time provided by the digital timer. Accordingly, the power controller retains all the…
Automatic External Switch Detection In Synchronous Switching Regulator Controller
Granted: February 28, 2008
Application Number:
20080048631
A synchronous switching regulator controller incorporates a switch detection circuit to determine the presence or absence of a power switch at the output of a switch driver so that the switch driver can be disabled when it is left unused. In one embodiment, the synchronous controller includes a switch detection circuit receiving a power cycle signal and the PWM ramp clock signal and measuring a voltage at an output node of the switch driver. The switch detection circuit provides a driver…
Generation of System Power-Good Signal in Hot-Swap Power Controllers
Granted: February 28, 2008
Application Number:
20080048665
A power controller system is described herein, which may consist of one or more power controller ICs and other components. Each power controller selectively couples power supply voltages to a plurality of electrical devices, such as cards that have been inserted into expansion slots in a server. To simplify processing by a system processor monitoring the health of the power subsystem, each power controller IC asserts a power-good signal at a power-good terminal only if the operating…
DC-DC Converter Recycling Leakage Inductor Losses
Granted: February 21, 2008
Application Number:
20080043498
A technique performed by a transformer-coupled DC-DC converter is described for recovering energy, due to leakage inductance in the transformer. A main power supply, providing a power supply voltage to a Vin terminal, is intermittently coupled to the primary winding of the transformer by a switching transistor. When the switching transistor is turned off, creating a voltage spike in the primary winding due to leakage inductance, the spike is conducted by a forward biased diode and…
MUTUAL-INTERPOLATING DELAY-LOCKED LOOP FOR HIGH-FREQUENCY MULTIPHASE CLOCK GENERATION
Granted: February 14, 2008
Application Number:
20080036514
A delay-locked loop (DLL) circuit with mutual-interpolating architecture that provides multiple-phase clock generation is presented. Each delay-cell in the DLL circuit delay chain is effectively an interpolator that combines two input clock signals: one input clock signal is received from the output clock of previous stage in the delay chain, and the other input clock signal is fed back from a following stage. Each delay cell supports the concurrent functions of delay and interpolation.…
Method for forming Schottky Diodes and Ohmic Contacts in the Same Integrated Circuit
Granted: December 6, 2007
Application Number:
20070281451
A method for forming an ohmic contact and a Schottky diode in an integrated circuit includes providing a semiconductor substrate; forming first and second diffusion regions in the semiconductor substrate; forming an insulating layer on the semiconductor substrate; forming a first contact opening in the insulating layer and over the first diffusion region to expose the semiconductor substrate; forming a barrier metal layer on the insulating layer and in the first contact opening; forming…
