Tunable filter in radio receiver
Granted: April 23, 2002
Patent Number:
6377788
A single chip superheterodyne AM receiver is disclosed herein. The receiver has a control pin for application of control signals to adjust a frequency response of a baseband filter to tailor its frequency response to a particular type of signal received by the receiver. Various techniques are described for enabling a complete superheterodyne AM receiver to be implemented on a single chip which receives an antenna input signal and outputs a digital data signal.
Voltage regulator that operates in either PWM or PFM mode
Granted: March 26, 2002
Patent Number:
RE37609
A switching voltage regulator achieves high efficiency by automatically switching between a pulse frequency modulation (PFM) mode and a pulse-width modulation (PWM) mode. Switching between the modes of voltage regulation is accomplished by monitoring the output voltage and the output current, wherein the regulator operates in PFM mode at small output currents and in PWM mode at moderate to large output currents. PFM mode maintains a constant output voltage by forcing the switching device…
Universal serial bus transceiver
Granted: March 12, 2002
Patent Number:
6356582
A universal serial bus transceiver is disclosed. In one embodiment, the transceiver includes a differential transmitting amplifier with a first input terminal that receives a reference voltage, a second input terminal that receives a first data input signal at a level corresponding to the reference voltage, and a third input terminal that receives a second data input signal at the reference voltage level. The differential transmitting amplifier generates first and second bus data output…
Fan speed control system having an integrated circuit fan controller and a method of using the same
Granted: February 26, 2002
Patent Number:
6351601
A fan speed control system for controlling the operation and speed of a fan is described. The fan speed control system includes a power control block for supplying an output voltage to the fan. An integrated circuit fan controller causes a resistor divider circuit to operably divide a selected portion of the output voltage. The integrated circuit fan controller comprises a data register which receives values indicative of control or speed operands from a host. A logic state machine…
Fully integrated all-CMOS AM receiver
Granted: November 27, 2001
Patent Number:
6324390
A superhetrodyne AM receiver and digital decoder are formed on the same chip. The frequency responses of the various filters are tied to the reference frequency. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for various amplifiers, filters, and other components in the system are adjusted based on frequency control signal in a PLL circuit in the local oscillator. Since the magnitude of the control signal reflects the…
Gate driver circuit for high and low side switches with primary and secondary shoot-through protection
Granted: October 23, 2001
Patent Number:
6307409
A driver circuit for alternately driving a first transistor and a second transistor connected in series includes primary and secondary anti-shoot-through protection. The driver circuit prevents shoot-through at the first and second transistors by using a pair of switch lock-out signals. The switch lock-out signals prevent one transistor from turning on until the other transistor is turned off. The driver circuit eliminates shoot-through in the driver devices driving the first and second…
Adding a laplace transform zero to a linear integrated circuit for frequency stability
Granted: October 16, 2001
Patent Number:
6304067
A compensation circuit for introducing a zero in a first circuit being incorporated in a closed loop feedback system includes a first capacitor, an amplifier and a second capacitor, connected in series between a feedback terminal and an input node of the first circuit. A first resistor is coupled between the feedback terminal and the input node to provide a resistive load to the compensation circuit. The amplifier amplifies the capacitance of the second capacitor to introduce a zero in…
Voltage monitor circuit with adjustable hysteresis using a single comparator
Granted: October 16, 2001
Patent Number:
6304088
A voltage monitor circuit for monitoring a first voltage includes a switch and a comparator. The switch has a first position and a second position. When the switch is in the first position, the switch connects the comparator to a first voltage terminal to monitor a second voltage. When the switch is in the second position, the switch connects the comparator to a second voltage terminal to monitor a third voltage. The second and third voltages are scaled voltages of the first voltage to…
Reference-corrected ratiometric MOS current sensing circuit
Granted: October 16, 2001
Patent Number:
6304108
A reference-corrected ratiometric current sensing circuit for sensing a current flowing through a load and a power-controlling pass device includes a sense device, a sense resistor, and a variable reference current source for providing a varying reference current. The varying reference current is varied according to a ratio of the voltage across the sense device to the voltage across the pass device. The ratiometric current sensing circuit of the present invention is capable of accurate…
Bias signal generator in radio receiver
Granted: August 21, 2001
Patent Number:
6278866
A single chip superhetrodyne AM receiver is disclosed herein. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for various amplifiers and other components in the system are adjusted based on frequency control signals in a PLL circuit in the local oscillator. Since the magnitude of the control signal reflects the process variations, the bias currents are adjusted based on the control signal to offset these variations in…
Accelerated turn-off of MOS transistors by bootstrapping
Granted: August 14, 2001
Patent Number:
6275395
A controller for limiting the current through a pass transistor is described herein that includes an NMOS control transistor coupled between the gate of the pass transistor and ground. The gate of the NMOS control transistor is coupled to a bootstrap circuit via a PMOS transistor. The PMOS transistor is turned on in the event of a current limit signal to momentarily apply the bootstrap voltage to the gate of the NMOS control transistor. This quickly turns on the NMOS control transistor…
Fully integrated all-CMOS AM transmitter with automatic antenna tuning
Granted: June 26, 2001
Patent Number:
6253068
A monolithic AM transmitter is disclosed. An external antenna forms part of a resonance network so that the antenna resonance point is automatically tuned to the transmit frequency. This provides flexibility with no added cost to the transmitter.
High slew rate input differential pair with common mode input to ground
Granted: June 19, 2001
Patent Number:
6249153
A differential pair includes a first and second transistors each having a control terminal coupled to a first input voltage, and a third and fourth transistors each having a control terminal coupled to a second input voltage. The first, second, third, and fourth transistors each has a first current handling terminal coupled to a reference voltage. The first and second transistors each has a second current handling terminal coupled to a first current mirror. The third and fourth…
Self-calibrating operational amplifier
Granted: June 5, 2001
Patent Number:
6242974
A stable, reliable, op-amp circuit overcomes the adverse affect of input offset voltages, VOSI, present at the input of op-amp. In one application, such VOSI-compensated op-amps employ a standard bandgap voltage input to achieve an improved voltage regulated reference source. A new circuit combination includes an auto-zero circuit arrangement intermediate an input network and the op-amp exhibiting the input voltage offset. In an auto-zero mode, the new auto-zero circuit arrangement…
PWM regulator with varying operating frequency for reduced EMI
Granted: March 20, 2001
Patent Number:
6204649
A switching regulator for reducing electromagnetic interference (EMI) includes a PWM controller which incorporates a varying frequency oscillator for controlling the operating frequency of the switching regulator. The varying frequency oscillator provides an oscillating signal having a continuously varying frequency about the center switching frequency of the switching regulator. The varying frequency oscillating signal causes the operating frequency of the switching regulator to vary,…
Multi-layer metallization capacitive structure for reduction of the simultaneous switching noise in integrated circuits
Granted: March 20, 2001
Patent Number:
6205013
A multi-layer metallization capacitive structure is provided to a conductive line, such as a power line or signal transmission line in an integrated circuit, where the undesired effect of simultaneous switching noise (SSN) is adverse due to rapid switching of pulses in a digital signal. The multi-layer metallization capacitive structure can help reduce the SSN effect in the integrated circuit by providing at least one metallization layer which extends substantially beneath the conductive…
Fully integrated all-CMOS AM receiver
Granted: December 26, 2000
Patent Number:
6167246
A single chip superhetrodyne AM receiver including a local oscillator which sweeps through a frequency range at a rate higher than a modulation frequency of the incoming RF signal. The local oscillator frequency is mixed with the incoming RF signal. An IF filter passes a selected frequency band from the mixer to a demodulator. The demodulator is tuned to demodulate any signal within a band of frequencies determined by the sweeping of the local oscillator. This increases the signal to…
Start-up circuit for voltage regulators
Granted: December 19, 2000
Patent Number:
6163140
A start-up circuit for voltage regulators includes a depletion mode field effect transistor (FET) having a drain electrically coupled to an input voltage, a source electrically coupled to the voltage regulator power supply input terminal and to a voltage corresponding to an output voltage of the voltage regulator, a body at a fixed voltage, and a gate electrically coupled to the output of a comparator. At start-up, the voltage regulator is powered through the FET. The drain current is…
Low power voltage reference with improved line regulation
Granted: November 21, 2000
Patent Number:
6150871
A voltage reference circuit includes a first transistor and a second transistor having their control terminals connected together, a first resistor coupled to a first current handling terminal of the first transistor, a second resistor coupled between an output node and a second current handling terminal of the second transistor, and a current mirror. The reference circuit provides an output voltage that is independent of variations in the supply voltage by adjusting the resistance of…
TTL input stage for negative supply systems
Granted: February 29, 2000
Patent Number:
6031392
A TTL input stage for negative supply voltage systems is described herein which obviates the need for a positive supply and a level shifter. In one embodiment, a first JFET current source, the emitter/collector of a PNP bipolar transistor, and a second JFET current source are connected in series between a control input and a negative supply voltage. The base of the bipolar transistor is connected to ground. At a control input of 2V.sub.be above ground, the PNP transistor has a V.sub.be…
