Novellus Systems Patent Grants

Plating method and apparatus with multiple internally irrigated chambers

Granted: September 11, 2012
Patent Number: 8262871
An apparatus for electroplating a layer of metal onto a work piece surface includes a membrane separating the chamber of the apparatus into a catholyte chamber and an anolyte chamber. In the catholyte chamber is a catholyte manifold region that includes a catholyte manifold and at least one flow distribution tube. The catholyte manifold and at least one flow distribution tube serve to mix and direct catholyte flow in the catholyte chamber. The provided configuration effectively reduces…

Electroless plating-liquid system

Granted: September 4, 2012
Patent Number: 8257781
A main reservoir holds cool reactant liquid. A reaction vessel for treating a substrate is connected to the main reservoir by a feed conduit. A heater is configured to heat reactant liquid in the feed conduit before the liquid enters the reaction vessel. Preferably, the heater is a microwave heater. A recycle conduit connects the reaction vessel with the main reservoir. Preferably, a recycle cooler cools reactant liquid in the recycle conduit before the liquid returns to the main…

Hardmask materials

Granted: August 21, 2012
Patent Number: 8247332
Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about ?600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group…

UV treatment of etch stop and hard mask films for selectivity and hermeticity enhancement

Granted: August 14, 2012
Patent Number: 8242028
A method for the ultraviolet (UV) treatment of etch stop and hard mask film increases etch selectivity and hermeticity by removing hydrogen, cross-linking, and increasing density. The method is particularly applicable in the context of damascene processing. A method provides for forming a semiconductor device by depositing an etch stop film or a hard mask film on a substrate and exposing the film to UV radiation and optionally thermal energy. The UV exposure may be direct or through…

Plating methods for low aspect ratio cavities

Granted: August 7, 2012
Patent Number: 8236160
The present invention relates to methods and apparatus for plating a conductive material on a workpiece surface in a highly desirable manner. Using a workpiece-surface-influencing device, such as a mask or sweeper, that preferentially contacts the top surface of the workpiece, relative movement between the workpiece and the workpiece-surface-influencing device is established so that an additive in the electrolyte solution disposed on the workpiece and which is adsorbed onto the top…

Remote plasma processing of interface surfaces

Granted: July 10, 2012
Patent Number: 8217513
Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For example, in one disclosed embodiment, a semiconductor processing apparatus includes a processing chamber, a load lock coupled to the processing chamber via a transfer port, a wafer pedestal disposed in the load lock and configured to support a wafer in the load lock, a remote plasma source configured to provide a remote plasma to…

Cascaded cure approach to fabricate highly tensile silicon nitride films

Granted: July 3, 2012
Patent Number: 8211510
A highly tensile dielectric layer is generated on a heat sensitive substrate while not exceeding thermal budget constraints. Cascaded ultraviolet (UV) irradiation is used to produce highly tensile films to be used, for example, in strained NMOS transistor architectures. Successive UV radiation of equal or shorter wavelengths with variable intensity and duration selectively breaks bonds in the Si—N matrix and minimizes shrinkage and film relaxation. Higher tensile stress than a…

Method for improving adhesion of low resistivity tungsten/tungsten nitride layers

Granted: June 26, 2012
Patent Number: 8207062
Methods of improving the adhesion of low resistivity tungsten/tungsten nitride layers are provided. Low resistivity tungsten/tungsten nitride layers with good adhesion are formed by treating a tungsten or tungsten nitride layer before depositing low resistivity tungsten. Treatments include a plasma treatment and a temperature treatment. According to various embodiments, the treatment methods involve different gaseous atmospheres and plasma conditions.

Deposit morphology of electroplated copper

Granted: June 12, 2012
Patent Number: 8197662
The present invention provides improved methods and devices for electroplating copper on a wafer. Some implementations of the present invention involve the pre-treatment of the wafer with a solution containing accelerator molecules. Preferably, the bath into which the wafer is subsequently placed for electroplating has a reduced concentration of accelerator molecules. The pre-treatment causes a reduction in roughness of the electroplated copper surface, particularly during the initial…

Plasma particle extraction process for PECVD

Granted: June 5, 2012
Patent Number: 8192806
A plasma-enhanced chemical vapor deposition (PECVD) process including plasma particle extraction is described. Charged particles suspended in discharge volume are moved together with a plasma and can then be flushed away. The particle extraction process reduces unwanted particles on the wafer after deposition and reduces total process time. In some embodiments, the process can involve powering an electrode in the process chamber located away from the wafer. This electrode can be powered…

High dose implantation strip (HDIS) in Hbase chemistry

Granted: June 5, 2012
Patent Number: 8193096
Plasma is generated using elemental hydrogen, a weak oxidizing agent, and a fluorine containing gas. An inert gas is introduced to the plasma downstream of the plasma source and upstream of a showerhead that directs gas mixture into the reaction chamber where the mixture reacts with the high-dose implant resist. The process removes both the crust and bulk resist layers at a high strip rate, and leaves the work piece surface substantially residue free with low silicon loss.

Architecture for high throughput semiconductor processing applications

Granted: June 5, 2012
Patent Number: 8192131
A semiconductor wafer processing system in accordance with an embodiment of the present invention includes a loading station, a load lock, a process module, an intermediate process module, and a transport module which further includes a load chamber, a transfer chamber, and a pass-through chamber between the load chamber and the transfer chamber. The intermediate process module may be coupled to the load chamber, or both the load chamber and the transfer chamber. In one embodiment, the…

Modulating etch selectivity and etch rate of silicon nitride thin films

Granted: May 29, 2012
Patent Number: 8187486
Etching of nitride and oxide layers with reactant gases is modulated by etching in different process regimes. High etch selectivity to silicon nitride is achieved in an adsorption regime where the partial pressure of the etchant is lower than its vapor pressure. Low etch selectivity to silicon nitride is achieved in a condensation regime where the partial pressure of the etchant is higher than its vapor pressure. By controlling partial pressure of the etchant, very high etch selectivity…

CVD flowable gap fill

Granted: May 29, 2012
Patent Number: 8187951
Methods of lining and/or filling gaps on a substrate by creating flowable silicon oxide-containing films are provided. The methods involve introducing vapor-phase silicon-containing precursor and oxidant reactants into a reaction chamber containing the substrate under conditions such that a condensed flowable film is formed on the substrate. The flowable film at least partially fills gaps on the substrates and is then converted into a silicon oxide film. In certain embodiments, the…

Hardmask materials

Granted: May 15, 2012
Patent Number: 8178443
Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about ?600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group…

Magnetically actuated chuck for edge bevel removal

Granted: May 8, 2012
Patent Number: 8172646
Provided are magnetically actuated wafer chucks that permit a wafer to be clamped or unclamped at any time during a process and at any rotational speed, as desired. Such wafer chucks may include constraining members that are movable between open and closed positions. In a closed position, a constraining member aligns the wafer after wafer handoff and/or clamps the wafer during rotation to prevent it from flying off the chuck. In an open position, the constraining member moves away from…

Wafer electroplating apparatus for reducing edge defects

Granted: May 8, 2012
Patent Number: 8172992
Methods, apparatuses, and various apparatus components, such as base plates, lipseals, and contact ring assemblies are provided for reducing contamination of the contact area in the apparatuses. Contamination may happen during removal of semiconductor wafers from apparatuses after the electroplating process. In certain embodiments, a base plate with a hydrophobic coating, such as polyamide-imide (PAI) and sometimes polytetrafluoroethylene (PTFE), are used. Further, contact tips of the…

Methods for reducing UV and dielectric diffusion barrier interaction

Granted: May 8, 2012
Patent Number: 8173537
Stability of an underlying dielectric diffusion barrier during deposition and ultraviolet (UV) processing of an overlying dielectric layer is critical for successful integration. UV-resistant diffusion barrier layers are formed by depositing the layer in a hydrogen-starved environment. Diffusion barrier layers can be made more resistant to UV radiation by thermal, plasma, or UV treatment during or after deposition. Lowering the modulus of the diffusion barrier layer can also improve the…

Methods and apparatus for depositing copper on tungsten

Granted: May 1, 2012
Patent Number: 8168540
Apparatus and methods for depositing copper on tungsten are presented. The invention finds particular use in the semiconductor industry for depositing copper seed layers onto fields or through silicon vias having tungsten barrier layers, both reducing cost and complexity of existing methods.

Edge profiling for process chamber shields

Granted: April 17, 2012
Patent Number: 8156892
Process chamber shields having specially profiled edges exhibit increased lifetime in PVD and CVD deposition chambers. Edge profiling reduces flaking and delamination of materials deposited onto the shields, thereby prolonging shield life, and, consequently, reducing costs associated with deposition. In one embodiment, a shield having an edge portion terminating in a rounded tip, where the tip has high curvature and a small thickness, is provided. In another aspect, a shield having a…