INTEGRATED CIRCUIT PACKAGE HAVING IMPROVED COPLANARITY
Granted: July 30, 2015
Application Number:
20150216066
One aspect of the present disclosure provides an IC package that includes a printed circuit board (PCB) having a first material layer located thereon. The first material layer has bond pads located therein that form a contact array defined by a perimeter. A second material layer is located at or adjacent an outer edge of the PCB. The second material layer is located outside the perimeter of the contact array and has a higher coefficient of thermal expansion (CTE) value and a greater…
SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR DETERMINING A QUANTITY OF LIGHT RECEIVED BY AN ELEMENT OF A SCENE
Granted: July 30, 2015
Application Number:
20150215512
A system, method, and computer program product are provided for determining a quantity of light received by an element of a scene. In use, a quantity of light received by a first element of the scene is determined by averaging a quantity of light received by elements of the scene that are associated with a selected set of light paths.
PHASE LOCK LOOP (PLL/FLL) CLOCK SIGNAL GENERATION WITH FREQUENCY SCALING TO POWER SUPPLY VOLTAGE
Granted: July 30, 2015
Application Number:
20150214963
A clock signal generation circuit provides an output clock signal to a digital system. The digital system is powered by a power supply voltage, VDD, that may include transients associated with the impedance of the packaged digital system. The clock signal generation circuit dynamically scales an output clock frequency based on monitored changed to VDD. The output clock frequency may be selected to approximate a maximum (margin-less) system Fmax for the monitored VDD. The average clock…
MODE-CHANGEABLE DUAL DATA RATE RANDOM ACCESS MEMORY DRIVER WITH ASYMMETRIC OFFSET AND MEMORY INTERFACE INCORPORATING THE SAME
Granted: July 30, 2015
Application Number:
20150213855
A memory driver, a method of driving a command bus for a synchronous dual data rate (sDDR) memory and a memory controller for controlling dynamic random-access memory (DRAM). In one embodiment, the memory driver includes: (1) pull-up and pull-down transistors couplable to a command bus of a memory controller and operable in 1N and 2N timing modes and (2) gear down offset circuitry coupled to the pull-up transistor and operable to offset the command bus when transitioning out of the 1N…
METHOD FOR CHANGING A RESOLUTION OF AN IMAGE SHOWN ON A DISPLAY
Granted: July 30, 2015
Application Number:
20150213786
Provided is a method for changing a resolution of an image shown on a display. The method, in one embodiment, includes, providing an image on a display, and detecting a relative distance of an object to the display. The method, in this embodiment, further includes changing a resolution of the image as the relative distance changes.
COMPUTING SYSTEM AND METHOD FOR AUTOMATICALLY MAKING A DISPLAY CONFIGURATION PERSISTENT
Granted: July 30, 2015
Application Number:
20150213776
A computing system and method for automatically making a display configuration persistent. One embodiment of the computing system includes: (1) a video adapter coupled to a data bus and operable to interface a display configuration associated with extended display identification data (EDID), (2) a cache configured to store the EDID, and (3) a central processing unit (CPU) coupled to the data bus and the cache, and operable to execute a driver associated with the video adapter and…
ADJUSTABLE SCREEN DISPLAY SIZE FOR AN ELECTRONIC DEVICE
Granted: July 30, 2015
Application Number:
20150213752
One aspect provides a method for image display. The method for image display, in accordance with one embodiment, includes providing a display, the display having a maximum display area (Amax) defined by a total number of pixels. The method for image display, in accordance with this embodiment, may further include activating, in an attempt to extend battery life, less than all of the total number of pixels of the display to provide a modified display area (Amod) that is less than the…
SYSTEM AND METHOD FOR INCREASING A GRAPHICS PROCESSING CAPABILITY OF A MOBILE DEVICE
Granted: July 23, 2015
Application Number:
20150206271
A system for, and method of, increasing a graphics processing capability of a mobile device and a mobile device incorporating the system or the method. In one embodiment, the system includes: (1) a graphics application programming interface (API) operable to cause a graphics processing resource of the mobile device to render data generated by an application to yield rendered data and (2) a network interface associated with the mobile device and operable to: (2a) transmit at least some of…
NEGATIVE BIT LINE WRITE ASSIST FOR MEMORY ARRAY
Granted: July 23, 2015
Application Number:
20150206576
A negative bit line write assist system includes an array voltage supply and a static random access memory (SRAM) cell that is coupled to the array voltage supply and controlled by bit lines during a write operation. Additionally, the negative bit line write assist system includes a bit line voltage unit that is coupled to the SRAM cell, wherein a distributed capacitance is controlled by a write assist command to provide generation of a negative bit line voltage during the write…
LEVERAGING COMPRESSION FOR DISPLAY BUFFER BLIT IN A GRAPHICS SYSTEM HAVING AN INTEGRATED GRAPHICS PROCESSING UNIT AND A DISCRETE GRAPHICS PROCESSING UNIT
Granted: July 23, 2015
Application Number:
20150206511
A graphics system includes an integrated graphics processor and a discrete graphics processing unit. An intra-system bus coupled data from the discrete graphics processing unit to the integrated graphics processor. In a high performance mode the discrete graphics processing unit is used to render frames. Compression techniques are used to aid in the data transfer over an intra-system bus interface.
MAPPING TOUCHSCREEN GESTURES TO ERGONOMIC CONTROLS ACROSS APPLICATION SCENES
Granted: July 23, 2015
Application Number:
20150202533
A technique of implementing on-screen gestures associated with a software application comprises receiving a first control input that relates to a first scene associated with the software application, translating the first control input into a first set of instructions based on a first mapping, and providing the first set of instructions to an operating system that includes the first set of instructions in the software application, receiving a second control input that relates to a second…
SYSTEM AND METHOD FOR WIRELESSLY SHARING GRAPHICS PROCESSING RESOURCES AND GPU TETHERING INCORPORATING THE SAME
Granted: July 23, 2015
Application Number:
20150206270
A system and method for wirelessly sharing graphics processing resources and a mobile device incorporating the system or the method. In one embodiment, the system includes: (1) a call evaluator operable to receive a graphics call from an application and determine whether the call should be wirelessly directed to a shared graphics processing resource and (2) a tether interface associated with the call evaluator and operable to receive calls from the call evaluator that the call evaluator…
SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR EXECUTING CASTING-ARITHMETIC INSTRUCTIONS
Granted: July 23, 2015
Application Number:
20150205757
A system, method, and computer program product are provided for executing casting-arithmetic instructions. The method comprises receiving a casting-arithmetic instruction that specifies an arithmetic operation to be performed on input data and at least one casting operation of an input casting operation and an output casting operation. Upon determining that the casting-arithmetic instruction specifies the input casting operation, the input casting operation is performed on identified…
METHODS AND SYSTEMS FOR MONITORING AND LOGGING SOFTWARE AND HARDWARE FAILURES
Granted: July 23, 2015
Application Number:
20150205711
Methods and systems monitor and log software and hardware failures (i.e. errors) over a communication network. In one embodiment, the method includes detecting an event caused by an error, and generating a log of the event in response to the detection. The method further includes generating a first message prompting if a user consents to allowing a third party provider track the error and transmitting the log to the third party provider over the communication network if the user consents…
USING HIGH PRIORITY THREAD TO BOOST CPU CLOCK RATE
Granted: July 23, 2015
Application Number:
20150205636
When a computing system is running at a lower clock rate, in response to an event that triggers the computing system to increase the clock rate, a list of threads pending execution by the computing system is accessed. The list includes a thread that, when executed, causes the clock rate to increase. That thread is selected and executed before any other thread in the list is executed.
TREE-BASED THREAD MANAGEMENT
Granted: July 23, 2015
Application Number:
20150205607
In one embodiment of the present invention, a streaming multiprocessor (SM) uses a tree of nodes to manage threads. Each node specifies a set of active threads and a program counter. Upon encountering a conditional instruction that causes an execution path to diverge, the SM creates child nodes corresponding to each of the divergent execution paths. Based on the conditional instruction, the SM assigns each active thread included in the parent node to at most one child node, and the SM…
TREE-BASED THREAD MANAGEMENT
Granted: July 23, 2015
Application Number:
20150205606
In one embodiment of the present invention, a streaming multiprocessor (SM) uses a tree of nodes to manage threads. Each node specifies a set of active threads and a program counter. Upon encountering a conditional instruction that causes an execution path to diverge, the SM creates child nodes corresponding to each of the divergent execution paths. Based on the conditional instruction, the SM assigns each active thread included in the parent node to at most one child node, and the SM…
SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR BULK SYNCHRONOUS BINARY PROGRAM TRANSLATION AND OPTIMIZATION
Granted: July 23, 2015
Application Number:
20150205586
A system, method, and computer program product are provided for. The method includes the steps of executing a block of translated binary instructions by multiple threads and gathering profiling data during execution of the block of translated binary instructions. The multiple threads are then synchronized at a barrier instruction associated with the block of translated binary instructions and the block of translated binary instructions is replaced with optimized binary instructions,…
MOBILE GAMING CONTROLLER WITH INTEGRATED VIRTUAL MOUSE
Granted: July 23, 2015
Application Number:
20150205381
A method is enacted in a computer system operatively coupled to a hand-actuated input device. The method includes the action of determining automatically which form of user input to offer a process running on the computer system, the user input including position data from the input device. The method also includes the action of offering the position data to the process in the form determined.
HYBRID ON-CHIP CLOCK CONTROLLER TECHNIQUES FOR FACILITATING AT-SPEED SCAN TESTING AND SCAN ARCHITECTURE SUPPORT
Granted: July 23, 2015
Application Number:
20150204945
Various aspects described or referenced herein are directed to different methods, systems, and computer program products for implementing hybrid on-chip clock controller techniques for facilitating at-speed scan testing and scan architecture support.
