Nvidia Patent Applications

INTERFACE ANALYSIS FOR VERIFICATION OF DIGITAL CIRCUITS

Granted: August 20, 2015
Application Number: 20150234963
A method for performing an interface analysis. The method includes identifying a first module included in a representation of a digital circuit. The method also includes identifying a first output port associated with the first module. The method further includes identifying a first logic path that extends from the first output port. The method also includes determining that the first logic path extends to a first storage element included in the first module. The method further includes…

INTRA SEARCHES USING INACCURATE NEIGHBORING PIXEL DATA

Granted: August 13, 2015
Application Number: 20150229921
One embodiment of the present invention sets forth a technique for performing an intra search. The technique includes performing a first intra search based on a first block size associated with a first pixel block included in a video frame to determine a first intra mode. The technique further includes reconstructing the first pixel block based on the first intra mode to generate reconstructed pixel data. The technique further includes performing, based on the reconstructed pixel data, a…

SYSTEM AND METHOD FOR CREATING A VIDEO FRAME FROM A SINGLE VIDEO FIELD

Granted: August 13, 2015
Application Number: 20150229879
A system and method of producing a frame of a video image from an interlaced field. In one embodiment, the method includes: (1) creating an equal-intensity trace from present samples in the field, (2) recognizing an equal-intensity path in the equal-intensity trace, (3) at least partially straightening the equal-intensity path and (4) using the equal-intensity path to determine an intensity value for a missing sample in the frame.

METHOD AND SYSTEM FOR GENERATING AN IMAGE INCLUDING OPTICALLY ZOOMED AND DIGITALLY ZOOMED REGIONS

Granted: August 13, 2015
Application Number: 20150229848
A method for generating images. The method includes capturing first image data representing a first scene taken optically at a first magnification index, wherein the first image data comprises a first region of an image. The method includes capturing second image data representing a second scene taken optically at a second magnification index that is less than the first magnification index, wherein the second image data comprises a second region of the image. The method includes…

OSCILLATOR FREQUENCY DIVIDER WITH IMPROVED PHASE NOISE

Granted: August 13, 2015
Application Number: 20150229311
A gated divider circuit includes a windowing unit configured to generate windowing waveforms from input oscillator waveforms having a fixed duty cycle. Additionally, the gated divider circuit includes a gated output unit coupled to the windowing unit and configured to provide selected ones of the input oscillator waveforms as controlled by corresponding selected ones of the windowing waveforms. Also included are a method of operating a gated divider circuit and a frequency conversion…

POWER-EFFICIENT STEERABLE DISPLAYS

Granted: August 13, 2015
Application Number: 20150228226
A method for angularly varying backlight illumination of a backlit display device. The method comprises determining at least one subject position and angularly varying a backlight illumination of a displayed image. The backlight illumination is angularly varied based upon and directed towards a determined position of the at least one subject. The angularly varied backlight illumination of the displayed image reduces the backlight illumination of the displayed image that is visible…

LIQUID CRYSTAL DISPLAY OVERDRIVE INTERPOLATION CIRCUIT AND METHOD

Granted: August 13, 2015
Application Number: 20150228055
A liquid crystal display (LCD) overdrive interpolation circuit and method, and an LCD drive system incorporating the circuit or method. In one embodiment, the circuit includes: (1) a diagonal interpolator operable to perform a diagonal interpolation along a diagonal direction in a lookup table based on TO and FROM gray levels and (2) a further interpolator coupled to the diagonal interpolator and operable to perform a further interpolation based on a result of the diagonal interpolation…

AUTOMATICALLY PERFORMING A TRADE-OFF BETWEEN VISUAL QUALITY AND LATENCY DURING RENDERING OF A VIDEO/GRAPHICS SEQUENCE

Granted: August 13, 2015
Application Number: 20150228046
A method includes automatically capturing, through a processor of a data processing device communicatively coupled to a memory, one or more parameter(s) related to a visual quality of rendering of a video frame that is part of a sequence on a display unit communicatively coupled to the processor and one or more parameter(s) related to latency associated with the rendering of the video frame on the display unit. The sequence is a video and/or a graphics sequence. The method also includes…

LOW TAU SYNCHRONIZER FLIP-FLOP WITH DUAL LOOP FEEDBACK APPROACH TO IMPROVE MEAN TIME BETWEEN FAILURE

Granted: August 6, 2015
Application Number: 20150222266
A flip-flop and a method of receiving a digital signal from an asynchronous domain. In one embodiment, the flip-flop includes: (1) a first loop coupled to a flip-flop input and having first and second stable states and (2) a second loop coupled to the first loop and having the first and second stable states, properties of cross-coupled inverters in the first and second loops creating a metastable state skewed toward the first stable state in the first loop and skewed toward the second…

SYSTEM AND METHOD FOR DYNAMIC FREQUENCY ESTIMATION FOR A SPREAD-SPECTRUM DIGITAL PHASE-LOCKED LOOP

Granted: August 6, 2015
Application Number: 20150222284
A digital phase-and-frequency controller. In one embodiment, the controller includes: (1) a first segment accumulator operable to accumulate errors while an accumulation-selection signal has a first value and (2) a second segment accumulator operable to accumulate errors while said accumulation-selection signal has a second value, and (3) circuitry operable to produce the control signal using the errors accumulated in the first segment accumulator while a use-selection signal has a first…

SYSTEM AND METHOD FOR COMPUTING GATHERS USING A SINGLE-INSTRUCTION MULTIPLE-THREAD PROCESSOR

Granted: August 6, 2015
Application Number: 20150221123
Systems for, and methods of, computing gathers for processing on a SIMT processor. In one embodiment, the system includes: (1) a thread group creator executing on a processor and operable to assign ray traces pertaining to a single receiver to threads for execution by a SIMT processor and (2) a memory configured to contain at least some of the threads for execution by the SIMT processor.

SYSTEM AND METHOD FOR ROUTING BUFFERED INTERCONNECTS IN AN INTEGRATED CIRCUIT

Granted: August 6, 2015
Application Number: 20150220675
A system and method for routing a buffered interconnect in an IC from a source cell to a target cell thereof. In one embodiment, the system includes: (1) a path tracer operable to designate the source cell as a current node and construct a path toward the target node by: (1a) defining a boundary about the current node based on a buffer driving length, (1b) trimming the boundary by any blockage therein to yield a candidate area for placing a buffer, (1c) dividing the boundary into line…

SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR IMPLEMENTING SOFTWARE-BASED SCOREBOARDING

Granted: August 6, 2015
Application Number: 20150220341
A system, method, and computer program product are provided for implementing a software-based scoreboarding mechanism. The method includes the steps of receiving a dependency barrier instruction that includes an immediate value and an identifier corresponding to a first register and, based on a comparison of the immediate value to the value stored in the first register, dispatching a subsequent instruction to at least a first processing unit of two or more processing units.

CONTROL FLOW OPTIMIZATION FOR EFFICIENT PROGRAM CODE EXECUTION ON A PROCESSOR

Granted: August 6, 2015
Application Number: 20150220314
A method includes identifying a divergent region of interest (DRI) not including a post dominator node thereof within a control flow graph, and introducing a decision node in the control flow graph such that the decision node post-dominates an entry point of the DRI and is dominated by the entry point. The method also includes redirecting a regular control flow path within the control flow graph from another node previously coupled to the DRI to the decision node, and redirecting a…

INTEGRATED CIRCUIT DETECTION CIRCUIT FOR A DIGITAL MULTI-LEVEL STRAP AND METHOD OF OPERATION THEREOF

Granted: August 6, 2015
Application Number: 20150219697
An integrated circuit (IC) based detection circuit for determining a strap value and a method of detecting a digital strap value. In one embodiment, the detection circuit includes: (1) a first receiver including transistors having first electrical characteristics that define a first threshold for the first receiver, the first receiver operable to generate a first binary digit based on an input signal and the first threshold and (2) a second receiver including transistors having second…

USER SPACE BASED PERFORMANCE STATE SWITCHING OF A PROCESSOR OF A DATA PROCESSING DEVICE

Granted: July 30, 2015
Application Number: 20150212569
A method includes capturing an interaction of a user of a data processing device therewith at a level of a user space through a process executing on the data processing device, and communicating the captured user interaction as an event from the user space to a kernel space associated with an operating system executing on the data processing device. The method also includes incorporating, through the kernel space, the communicated event as a feedback to an algorithm executing on a…

SYSTEM AND PROCESSOR FOR IMPLEMENTING INTERRUPTIBLE BATCHES OF INSTRUCTIONS

Granted: July 30, 2015
Application Number: 20150212819
A system, method, and computer program product are provided for scheduling interruptible hatches of instructions for execution by one or more functional units of a processor. The method includes the steps of receiving a batch of instructions that includes a plurality of instructions and dispatching at least one instruction from the batch of instructions to one or more functional units for execution. The method further includes the step of receiving an interrupt request that causes an…

METHODS AND SYSTEMS FOR MAINTENANCE AND CONTROL OF APPLICATIONS FOR PERFORMANCE TUNING

Granted: July 30, 2015
Application Number: 20150212815
Methods and systems for maintenance and control of multiple versions of an application are disclosed. The method includes creating a first version of the application comprising computer-executable instructions and executing the first version of the application. The first version of the application and related performance metrics are stored in a memory. The method includes creating at least one modified version of the application by making changes to the computer-executable instructions…

SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR MULTIPLE STIMULUS SENSORS FOR AN INPUT DEVICE

Granted: July 30, 2015
Application Number: 20150212631
A system, method, and computer program product are provided for sensing input stimulus at an input device. The method includes the steps of configuring an input device comprising a first sensor layer and a second sensor layer to activate the first sensor layer and to deactivate the second sensor layer, where the second sensor layer is layered above the first sensor layer and associated with a stimulus device. When a request to activate the second sensor layer is received, the input…

STYLUS TOOL WITH DEFORMABLE TIP

Granted: July 30, 2015
Application Number: 20150212601
A passive stylus with a deformable tip is described herein. In one embodiment, a thin annular body configured to be hand-held with a chisel shaped tip disposed at the first end of the body is provided. The chisel shaped tip includes a deformable material such that the chisel shaped tip is operable to interface with a touch a sensitive surface with a detectable surface area when a first pressure is exerted on the body and translated to the chisel shaped tip. The chisel shaped tip is…