Zero-DC-power active termination with CMOS overshoot and undershoot clamps
Granted: February 26, 2002
Patent Number:
6351138
An active terminating circuit has n-channel and p-channel sensing transistors with gates connected to a transmission line. The sensing transistors drive a back node connected to a pair of capacitors. One capacitor drives a p-gate node coupled to a gate of a p-channel clamping transistor, while the other capacitor drives an n-gate node coupled to a gate of an n-channel clamping transistor. The drains of the clamping transistors are connected to the transmission line. Resistors pull the…
Triple-slope clock driver for reduced EMI
Granted: January 1, 2002
Patent Number:
6335638
A clock driver for an integrated circuit reduces electro-magnetic interference (EMI) induced in nearby metal traces yet also reduces jitter due to noise at the switching threshold. A weak driver using small n-channel and p-channel transistors initially drives the clock line. Then a pulse generator produces a short pulse to a gate of a large driver transistor. The large driver transistor is pulsed on for a very short period of time. The large driver transistor is turned off by the end of…
Quiet output buffers with neighbor sensing of wide bus and control signals
Granted: December 11, 2001
Patent Number:
6329835
An output buffer has a large pull-down driver transistor that draws a large current. The large driver transistor is pulsed off when a neighboring pin is switching, reducing noise and ground bounce. Pulse signals and a local enable are NOR'ed together to drive the gate of the large driver. The pulse signals are routed to many output buffers in a chip. Each data input is sent to a detector slice. The detector slice normally generates a pulse when the data input changes. These pulses…
Dual-sided undershoot-isolating bus switch
Granted: November 20, 2001
Patent Number:
6320408
Both buses connected to a bus switch are protected from undershoots. A bus switch transistor is an n-channel metal-oxide-semiconductor (MOS) with its source connected to a first bus and its drain connected to a second bus. An enable gate drives the gate node of the bus switch transistor high to enable or low to disable. Undershoot sensing circuits are attached to the first and second bus. When a low-going transition is detected by an undershoot sensing circuit, an n-channel connecting…
Duty-cycle correction driver with dual-filter feedback loop
Granted: November 20, 2001
Patent Number:
6320438
A clock generator has a duty cycle correction circuit that adjusts the duty cycle to 50%. A modulator is an inverter with extra source-limiting transistors in series to the power and ground supplies. A control voltage of about Vcc/2 is applied to the source-limiting transistors, causing them to operate in the linear region with limited current. A slow-slew output from the modulator is buffered by a driver. The driver output is filtered by a linear detector with a series resistor and…
Active fail-safe detect circuit for differential receiver
Granted: September 11, 2001
Patent Number:
6288577
A fail-safe circuit for a differential receiver can tolerate high common-mode voltages. An output from a differential amplifier that receives a V+ and a V− differential signal can be blocked by a NOR gate when the fail-safe condition is detected, such as when the V+, V− lines are open. Pullup resistors pull V+, V− to Vcc when an open failure occurs. A pair of comparators receive a reference voltage on the non-inverting input. Once comparator outputs a…
Low-voltage differential-signalling output buffer with pre-emphasis
Granted: September 11, 2001
Patent Number:
6288581
A low-voltage differential signaling (LVDS) output buffer has an improved eye pattern. The LVDS buffer has two parallel stages. A primary stage generates enough current to generate a first voltage drop across a load resistor. At higher frequencies, parasitic capacitive coupling reduces this first voltage drop, closing the eye pattern. A boost stage generates an additional boost current through the load resistor, adding to the voltage drop and opening the eye pattern. The boost stage is…
Zero standby-current power-on reset circuit with Schmidt trigger sensing
Granted: September 11, 2001
Patent Number:
6288584
A power-up-reset circuit draws zero standby current. Rather than use a voltage divider that always draws current, a capacitive-pullup divider is used as the first stage. The capacitive-pullup divider has a capacitor to power (Vcc) and n-channel series transistors to ground. A sensing node between the capacitor and n-channel series transistors is initially pulled high to Vcc as Vcc is ramped up. The n-channel transistors remain off until Vcc reaches about 1.5 volts. Then the n-channel…
Low-power CMOS voltage follower using dual differential amplifiers driving high-current constant-voltage push-pull output buffer
Granted: September 4, 2001
Patent Number:
6285256
An amplifier designed from CMOS transistors provides a high current output, despite having a unity-gain configuration. A push-pull output stage drives the output using a p-channel pull-up transistor and an n-channel pull-down transistor. The pull-down transistor's gate is driven by an output from an inverting differential amplifier, that has one differential transistor gate driven by an input voltage and the other driven by the output voltage. A second differential amplifier is…
Fine-tuning phase-locked loop PLL using variable resistor between dual PLL loops
Granted: August 28, 2001
Patent Number:
6281727
A clock generator uses two PLL loops and a variable resistor to generate a variable output frequency from a single fixed-frequency reference clock. Each PLL loop receives the reference clock and phase-compares it with a feedback clock. The feedback clock in one loop is slightly faster in frequency than the feedback clock in the second loop. The input voltages to voltage-controlled oscillators (VCOs) in the two loops thus vary slightly. A variable resistor is connected between the two…
CMOS output buffer with feedback control on sources of pre-driver stage
Granted: July 3, 2001
Patent Number:
6255867
Ground and power-supply bounce are reduced for a CMOS output buffer. An n-channel driver transistor and a p-channel driver transistor are attached to the output pad. The gate of the n-channel driver transistor is driven by a pre-driver inverter. The pre-driver is a CMOS inverter except that the p-channel source is connected to power through a p-channel and an n-channel source-control transistor in parallel. The n-channel source-control transistor has its gate connected to power so that…
Complementary differential amplifier with resistive loads for wide common-mode input range
Granted: June 26, 2001
Patent Number:
6252435
A differential amplifier has a wide common-mode input range since it uses two complementary amplifiers. One amplifier has a differential pair of n-channel transistors while the other amplifier has a differential pair of p-channel transistors. The input range is extended further by replacing the current mirror transistors with load resistors. The load resistors continue to supply current to the differential pair transistors even when the input is within a transistor-threshold of the power…
CMOS over voltage-tolerant output buffer without transmission gate
Granted: March 27, 2001
Patent Number:
6208178
An isolating output buffer is operated by a low-voltage Vcc power supply, yet can be put in a high-impedance state. The output buffer does not draw significant current when its output is driven by an external driver to a voltage above Vcc. The over-voltage on the output pad is coupled to the n-well under p-channel transistors through a fixed-gate p-channel transistor. The over-voltage from the n-well is then coupled to a source node through another p-channel transistor. The source node…
CMOS output buffer with negative feedback dynamic-drive control and dual P,N active-termination transmission gates
Granted: February 6, 2001
Patent Number:
6184730
An output buffer for a line driver uses transmission gates for active termination. A large p-channel driver is pulsed on during a low-to-high output transition, but this driver is turned off once the output voltage reaches a threshold. A feedback circuit includes a sensing inverter that has its input connected to the output node. The sensing inverter causes the gate of the p-channel driver to be driven high once the output swings past the threshold. A similar n-channel driver transistor…
RF front-end with signal cancellation using receiver signal to eliminate duplexer for a cordless phone
Granted: January 2, 2001
Patent Number:
6169912
A fully duplex cordless telephone has a transmitter and a receiver connected to a common antenna. A broad-band antenna coupler such as a ferrite-core hybrid transformer may replace a more costly duplexer with filters. Since all characteristics of the transmit signal are known, the transmit signal removes itself from the receiver by signal cancellation. The canceling signal is extracted from the composite signal from within the receiver front end, after the antenna coupler and low noise…
Versatile gate-array cell with interstitial transistors for compact flip-flops with set or clear
Granted: November 7, 2000
Patent Number:
6144241
A gate-array cell uses smaller and larger transistors. Four larger transistors are provided: two n-channel and two p-channel. A small p-channel transistor is placed between the contact tabs of the polysilicon lines of the two larger p-channel transistors, and between the p-channel transistors and a N-well tap. A small n-channel transistor is similarly placed between the contact tabs of polysilicon lines of the two larger n-channel transistors, and between the n-channel transistors and a…
Accurate PLL charge pump with matched up/down currents from Vds-compensated common-gate switches
Granted: September 26, 2000
Patent Number:
6124741
A more accurate charge pump reduces phase error in a PLL. An UP input pulse causes a p-channel drive transistor to charge a filter capacitor on the output, while a down DN input pulse causes an n-channel drive transistor to discharge the output. The drive transistors are connected to power or ground through a supply transistor. The supply transistor is biased on in the linear region and is not switched off. The sources of the drive transistors are always driven by the supply transistors,…
Actively-driven thin-oxide MOS transistor shunt for ESD protection of multiple independent supply busses in a mixed-signal chip
Granted: September 12, 2000
Patent Number:
6118640
An electro-static-discharge (ESD) protection circuit protects internal power supplies in a mixed-signal IC. An active protection circuit is used. The ESD-protection circuit uses standard transistors and is actively enabled and disabled by standard transistors. A standard thin-oxide NMOS transistor is the ESD switch (shunt) between power supply busses. This thin-oxide transistor ESD switch is actively enabled and disabled by a control circuit. NMOS transistors in the control circuit…
Translator switch transistor with output voltage adjusted to match a reference by controlling gate and substrate charge pumps
Granted: September 5, 2000
Patent Number:
6114876
A voltage translator uses an n-channel translator transistor to translate an input voltage at its drain to an output voltage at its source. The gate and substrate of the translator transistor are each biased by charge pumps. A reference transistor is also biased by the charge pumps. A reference input voltage is translated to a reference output voltage by the reference transistor. The reference output voltage is compared to a target output voltage by comparators. When the reference output…
Cancellation of injected charge in a bus switch
Granted: June 13, 2000
Patent Number:
6075400
A bus switch has control of the timing of turning on and off the main p-channel and n-channel transistors that connect two network nodes. A pair of cross-coupled NAND gates form a set-reset S-R latch that controls the gates of the main p-channel and n-channel transistors. The S-R latch controls the timing so that the main p-channel and n-channel transistors switch at about the same time, canceling much of each other's injected charge. Since the main p-channel is larger due to the lower…
