Intel Patent Applications

TUNNING CONFIGURATION PARAMETERS FOR GRAPHICS PIPELINE FOR BETTER USER EXPERENCE

Granted: April 25, 2024
Application Number: 20240135485
The disclosure relates to tuning configuration parameters for graphics pipeline for better user experience. A device for graphics processing, comprising: hardware engines; a graphics pipeline at least partly implemented by the hardware engines; and a tuner, coupled to the hardware engines and the graphics pipeline, the tuner to: collect statuses of the device during runtime for a previous frame; determine configuration parameters based on the collected statuses, the configuration…

METHODS AND APPARATUS FOR USING ROBOTICS TO ASSEMBLE/DE-ASSEMBLE COMPONENTS AND PERFORM SOCKET INSPECTION IN SERVER BOARD MANUFACTURING

Granted: April 25, 2024
Application Number: 20240138133
The disclosure is directed to apparatus and methods for manufacturing including a collaborative robot, a camera operatively coupled to the collaborative robot, a memory coupled to the collaborative robot, and processing circuitry coupled to the memory, the processing circuitry configured to receive image data of at least one component intended for a printed circuit board (PCB), the image data collected by the camera operatively coupled to the collaborative robot, determine, based on the…

ENHANCED SIGNALING OF ADDITION AND DELETION OF COMMUNICATION LINKS FOR MULTI-LINK DEVICES

Granted: April 25, 2024
Application Number: 20240138006
This disclosure describes systems, methods, and devices related to adding or removing communication access points (APs) affiliated with an associated AP multi-link device (AP-MLD). A non-AP-MLD may identify a communication link between the non-AP-MLD and an AP-MLD, the communication link previously used by the non-AP-MLD; encode a request frame comprising a multi-link reconfiguration element indicative of a request to add or remove the communication link; cause the non-AP-MLD to transmit…

MECHANISM TO ENABLE ALIGNED CHANNEL ACCESS

Granted: April 25, 2024
Application Number: 20240137984
This disclosure describes systems, methods, and devices related to aligned channel access. A device may perform a first backoff countdown on a first link associated with a first station device (STA) of the device, wherein the device is a multi-link device (MLD). The device may detect a second backoff countdown associated with a second STA of the MLD after the first backoff countdown reaches zero. The device may determine to hold the first backoff countdown at zero based on the value of…

ENHANCED TRAFFIC INDICATIONS FOR MULTI-LINK WIRELESS COMMUNICATION DEVICES

Granted: April 25, 2024
Application Number: 20240137800
This disclosure describes systems, methods, and devices related to traffic indications for multi-link devices (MLDs). A device may generate a first traffic indication map (TIM) with a first bitmap including a first indication that traffic is to be sent by a first access point (AP) device of the MLD to a first non-AP device of a second MLD using a first communication link The device may generate a second TIM with a second bitmap including a second indication that no traffic is to be sent…

CHANNEL SOUNDING FOR WIRELESS LOCAL AREA NETWORK SENSING

Granted: April 25, 2024
Application Number: 20240137185
This disclosure describes systems, methods, and devices related to WLAN sensing sounding. A device may identify a sensing null data packet (NDP) request frame received from a second device, the sensing NDP request frame associated with performing a wireless local area network channel sounding procedure; identify transmit parameters included in a transmit control field of the sensing NDP request frame; generate an NDP frame using the transmit parameters; and send, in response to the…

MICROELECTRONIC ASSEMBLIES

Granted: April 25, 2024
Application Number: 20240136323
Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface, and a die secured to the package substrate, wherein the die has a first surface and an opposing second surface, the die has first conductive contacts at the first surface and second conductive contacts at the second surface, and the first conductive contacts…

IC DIE AND HEAT SPREADERS WITH SOLDERABLE THERMAL INTERFACE STRUCTURES FOR MULTI-CHIP ASSEMBLIES INCLUDING SOLDER ARRAY THERMAL INTERCONNECTS

Granted: April 25, 2024
Application Number: 20240136244
Thermal heat spreaders and/or an IC die with solderable thermal structures may be assembled together with a solder array thermal interconnects. A thermal heat spreader may include a non-metallic material and one or more metallized surfaces suitable for bonding to a solder alloy employed as thermal interface material between the heat spreader and an IC die. An IC die may include a metallized back-side surface similarly suitable for bonding to a thermal interconnect comprising a solder…

COPPER FILL FOR HEAT MANAGEMENT IN INTEGRATED CIRCUIT DEVICE

Granted: April 25, 2024
Application Number: 20240136243
Described herein are integrated circuit devices that include semiconductor devices near the center of the device, rather than towards the top or bottom of the device. In this arrangement, heat can become trapped inside the device. Metal fill, such as copper, is formed within a portion of the device, e.g., over the semiconductor devices and any front side interconnect structures, to transfer heat away from the semiconductor devices and towards a heat spreader.

INITIALIZER FOR CIRCLE DISTRIBUTION FOR IMAGE AND VIDEO COMPRESSION AND POSTURE DETECTION

Granted: April 25, 2024
Application Number: 20240135750
An initializer for circle distribution on a 2D surface using a polar coordinate system for image compression, video compression, motion detection, and posture detection. The initializer can also be used for sphere distribution in a 3D shape. The initializer uses a mixed deterministic and iterative/stochastic approach. Using the polar coordinate system for initialization enables coverage of the user space, and after parameters are initialized, the method transitions to a cartesian…

INCREMENTAL NEURAL REPRESENTATION FOR FAST GENERATION OF DYNAMIC FREE-VIEWPOINT VIDEOS

Granted: April 25, 2024
Application Number: 20240135483
Described herein is a graphics processor comprising a system interconnect and a graphics processor cluster coupled with the system interconnect. The graphics processor cluster includes circuitry configurable to generate per-frame neural representations of a multi-view video via incremental training and transferal of weights.

SUPER-OPTIMIZATION EXPLORER USING E-GRAPH REWRITING FOR HIGH-LEVEL SYNTHESIS

Granted: April 25, 2024
Application Number: 20240135076
Described herein is a technique for automatic program code optimization for high-level synthesis. One embodiment provides a method comprising receiving input including first program code in a high-level language; translating the first program code into an intermediate language; constructing an equality graph (e-graph) from the intermediate language; interleaving control-flow, data path, and gate-level transformations to explore equivalent hardware designs represented by the e-graph;…

BROADCAST ASYNCHRONOUS LOADS TO SHARED LOCAL MEMORY

Granted: April 25, 2024
Application Number: 20240134797
Embodiments described herein provide a technique to facilitate the broadcast or multicast of asynchronous loads to shared local memory of a plurality of graphics cores within a graphics core cluster. One embodiment provides a graphics processor including a cache memory a graphics core cluster coupled with the cache memory. The graphics core cluster includes a plurality of graphics cores. The plurality of graphics cores includes a graphics core configured to receive a designation as a…

ADJUSTING WORKLOAD EXECUTION BASED ON WORKLOAD SIMILARITY

Granted: April 25, 2024
Application Number: 20240134705
Adjusting workload execution based on workload similarity. A processor may determine a similarity of a first workload to a second workload. The processor may adjust execution of the first workload based on execution parameters of the second workload and the similarity of the first workload to the second workload.

SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX ADD, SUBTRACT, AND MULTIPLY

Granted: April 25, 2024
Application Number: 20240134644
Embodiments detailed herein relate to matrix operations. In particular, support for matrix (tile) addition, subtraction, and multiplication is described. For example, circuitry to support instructions for element-by-element matrix (tile) addition, subtraction, and multiplication are detailed. In some embodiments, for matrix (tile) addition, decode circuitry is to decode an instruction having fields for an opcode, a first source matrix operand identifier, a second source matrix operand…

CONSTANT MODULO VIA RECIRCULANT REDUCTION

Granted: April 25, 2024
Application Number: 20240134604
Described herein is a generalized optimal reduction scheme for reducing an array modulo a constant. The constant modulo operation calculates a result for array of bits xi, width n modulo an odd positive integer constant d, (e.g., x[n:0] mod d). Circuitry to perform such operation can be configured to compress the array of bits xi, width n into an array of bits yi width m. The techniques described herein enable the design of optimal circuitry via iterative exploration of all potential…

VIRTUAL ADDRESS ACCESS TO GPU SURFACE AND SAMPLER STATES

Granted: April 25, 2024
Application Number: 20240134527
Embodiments described herein provide a technique to enable access to entries in a surface state or sampler state using 64-bit virtual addresses. One embodiment provides a graphics core that includes memory access circuitry configured to facilitate access to the memory by functional units of the graphics core. The memory access circuitry is configured to receive a message to access an entry in a surface state or a sampler state associated with a parallel processing operation. The message…

WAFER-LEVEL BOND STRENGTH MEASUREMENT

Granted: April 25, 2024
Application Number: 20240133799
This disclosure describes systems, methods, and devices related to bond strength measurement. A device may comprise a first portion of a plate connected to a movement mechanism, a second portion of the plate comprising a sticky probe and a third portion of the plate comprising a mirror with a reflective side pointing outwards. The device may further comprise an optical fiber sensor assembly comprising an optical fiber bundle for sending light through a first optical fiber and receiving…

APPARATUS, SYSTEM AND METHOD OF CONFIGURING AN UPLINK TRANSMISSION IN A TRIGGER-BASED MULTI-USER UPLINK TRANSMISSION

Granted: April 18, 2024
Application Number: 20240129944
For example, a wireless communication device may be configured to determine an expected interference-based value corresponding to an Uplink (UL) transmission from a wireless communication station (STA) in a Trigger-Based (TB) Multi-User (MU) UL transmission to be communicated from a plurality of STAs to the wireless communication device; to determine one or more transmit (Tx) configuration parameters for the STA based on the expected interference-based value corresponding to the UL…

TECHNOLOGIES FOR A FLEXIBLE 3D POWER PLANE IN A CHASSIS

Granted: April 18, 2024
Application Number: 20240130068
Technologies for a flexible three-dimensional power plane in a chassis are disclosed. In one embodiment, a flexible ribbon cable is laid along a circuit board tray. The flexible ribbon cable is secured to the tray using power bosses. The power bosses connect to one or more conductors on the ribbon cable. When the circuit board is mounted on the circuit board tray, the power bosses extend through holes in the circuit board and mate with power clips on the surface of the circuit board…