LED CURRENT CONTROL
Granted: April 25, 2013
Application Number:
20130099684
Parallel light emitting diode channels may be controlled using a pulsed control signal input characterized by an input duty cycle and one or more current sense input signals. Each of the one or more current sense input signals is indicative of a current through a corresponding load channel of one or more load channels. One or more pulsed channel current control signals are provided to one or more corresponding dimming controls correspondingly coupled to the one or more load channels.…
Top-side Cooled Semiconductor Package with Stacked Interconnection Plates and Method
Granted: April 25, 2013
Application Number:
20130099364
A top-side cooled semiconductor package with stacked interconnection plate is disclosed. The semiconductor package includes a circuit substrate with terminal leads, a semiconductor die atop the circuit substrate, a low thermal resistance intimate interconnection plate for bonding and interconnecting a top contact area of the semiconductor die with the circuit substrate, a low thermal resistance stacked interconnection plate atop the intimate interconnection plate for top-side cooling, a…
Trench MOSFET with Integrated Schottky Barrier Diode
Granted: March 28, 2013
Application Number:
20130075808
A Schottky diode includes a semiconductor layer formed on a semiconductor substrate; first and second trenches formed in the semiconductor layer where the first and second trenches are lined with a thin dielectric layer and being filled partially with a trench conductor layer and remaining portions of the first and second trenches are filled with a first dielectric layer; and a Schottky metal layer formed on a top surface of the semiconductor layer between the first trench and the second…
Lateral PNP Bipolar Transistor with Narrow Trench Emitter
Granted: March 28, 2013
Application Number:
20130075746
A lateral bipolar transistor includes trench emitter and trench collector regions to form ultra-narrow emitter regions, thereby improving emitter efficiency. The same trench process is used to form the emitter/collector trenches as well as the trench isolation structures so that no additional processing steps are needed to form the trench emitter and collector. In embodiments of the present invention, the trench emitter and trench collector regions may be formed using ion implantation…
Lateral PNP Bipolar Transistor Formed with Multiple Epitaxial Layers
Granted: March 28, 2013
Application Number:
20130075741
A lateral bipolar transistor with deep emitter and deep collector regions is formed using multiple epitaxial layers of the same conductivity type. Deep emitter and deep collector regions are formed without the use of trenches. Vertically aligned diffusion regions are formed in each epitaxial layer so that the diffusion regions merged into a contiguous diffusion region after annealing to function as emitter or collector or isolation structures. In another embodiment, a lateral trench PNP…
METHOD OF INTEGRATING HIGH VOLTAGE DEVICES
Granted: March 21, 2013
Application Number:
20130072004
The present invention is directed to a method for forming multiple active components, such as bipolar transistors, MOSFETs, diodes, etc., on a semiconductor substrate so that active components with higher operation voltage may be formed on a common substrate with a lower operation voltage device and incorporating the existing proven process flow of making the lower operation voltage active components. The present invention is further directed to a method for forming a device of…
METHOD OF INTEGRATING HIGH VOLTAGE DEVICES
Granted: March 21, 2013
Application Number:
20130071994
The present invention is directed to a method for forming multiple active components, such as bipolar transistors, MOSFETs, diodes, etc., on a semiconductor substrate so that active components with higher operation voltage may be formed on a common substrate with a lower operation voltage device and incorporating the existing proven process flow of making the lower operation voltage active components. The present invention is further directed to a method for forming a device of…
SEMICONDUCTOR CHIP INTEGRATING HIGH AND LOW VOLTAGE DEVICES
Granted: March 21, 2013
Application Number:
20130069154
The present invention is directed to a semiconductor chip comprising a high voltage device and a low voltage device disposed thereon. The chip may be formed in several different configurations. For example, the semiconductor chip may include a NPN bipolar transistor, PNP bipolar transistor, a diode, an N channel DMOS transistor and the like. the first doped well being configured as a base of the DMOS transistor, a P channel DMOS transistor and the like. These and other embodiments are…
Nanotube Semiconductor Devices and Nanotube Termination Structures
Granted: January 17, 2013
Application Number:
20130015494
A termination structure for a semiconductor device includes an array of termination cells formed using a thin epitaxial layer (nanotube) formed on sidewalls of dielectric-filled trenches. In other embodiments, semiconductor devices are formed using a thin epitaxial layer (nanotube) formed on sidewalls of dielectric-filled trenches.
MOS DEVICE WITH LOW INJECTION DIODE
Granted: January 10, 2013
Application Number:
20130009242
A semiconductor device is formed on a semiconductor substrate. The device includes: a drain; an epitaxial layer overlaying the drain, wherein a drain region extends into the epitaxial layer; and an active region. The active region includes: a body disposed in the epitaxial layer, having a body top surface; a source embedded in the body, extending from the body top surface into the body; a gate trench extending into the epitaxial layer; a gate disposed in the gate trench; an active region…
LOW CAPACITANCE TRANSIENT VOLTAGE SUPPRESSOR (TVS) WITH REDUCED CLAMPING VOLTAGE
Granted: January 3, 2013
Application Number:
20130001694
A low capacitance transient voltage suppressor with reduced clamping voltage includes an n+ type substrate, a first epitaxial layer on the substrate, a buried layer formed within the first epitaxial layer, a second epitaxial layer on the first epitaxial layer, and an implant layer formed within the first epitaxial layer below the buried layer. The implant layer extends beyond the buried layer. A first trench is at an edge of the buried layer and an edge of the implant layer. A second…
Method For Forming A Transient Voltage Suppressor Having Symmetrical Breakdown Voltages
Granted: December 27, 2012
Application Number:
20120329238
A vertical transient voltage suppressing (TVS) device includes a semiconductor substrate of a first conductivity type where the substrate is heavily doped, an epitaxial layer of the first conductivity type formed on the substrate where the epitaxial layer has a first thickness, and a base region of a second conductivity type formed in the epitaxial layer where the base region is positioned in a middle region of the epitaxial layer. The base region and the epitaxial layer provide a…
POWER MOS DEVICE FABRICATION
Granted: December 27, 2012
Application Number:
20120329225
Fabricating a semiconductor device includes forming a mask on a substrate having a top substrate surface; forming a gate trench in the substrate, through the mask; depositing gate material in the gate trench; removing the mask to leave a gate structure; implanting a body region; implanting a source region; forming a source body contact trench having a trench wall and a trench bottom; forming a plug in the source body contact trench, wherein the plug extends below a bottom of the body…
SPLIT-GATE STRUCTURE IN TRENCH-BASED SILICON CARBIDE POWER DEVICE
Granted: December 20, 2012
Application Number:
20120319132
An integrated structure includes a plurality of split-gate trench MOSFETs. A plurality of trenches is formed within the silicon carbide substrate composition, each trench is lined with a passivation layer, each trench being substantially filled with a first conductive region a second conductive region and an insulating material having a dielectric constant similar to a dielectric constant of the silicon carbide substrate composition. The first conductive region is separated from the…
HIGH VOLTAGE AND HIGH POWER BOOST CONVETER WITH CO-PACKAGED SCHOTTKY DIODE
Granted: December 13, 2012
Application Number:
20120313613
A high voltage and high power boost converter is disclosed. The boost converter includes a boost converter IC and a discrete Schottky diode, both of which are co-packaged on a standard single common die pad. The bottom cathode is electrically connected to the common die pad. It is emphasized that this abstract is being provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. This…
FABRICATION OF MOS DEVICE WITH VARYING TRENCH DEPTH
Granted: November 29, 2012
Application Number:
20120302021
Fabricating a semiconductor device includes: forming a gate trench in an epitaxial layer overlaying a semiconductor substrate; disposing gate material in the gate trench; forming a body in the epitaxial layer; forming a source in the body; forming an active region contact trench that has a varying trench depth; and disposing a contact electrode within the active region contact trench. Forming the active region contact trench includes performing a first etch to form a first contact trench…
Constant On-Time Switching Regulator Implementing Light Load Control
Granted: November 29, 2012
Application Number:
20120299569
A control circuit for a switching regulator implements constant on-time control scheme with synchronous rectification and applies an integrated standard and light load control loop to improve light load efficiency and enhance transient response. In one embodiment, the control circuit includes a reference voltage selection circuit configured to select, based on a low-side current signal, a first reference voltage for standard load condition and a second reference voltage for light load…
Constant On-Time Switching Regulator Implementing Dual Control Loops
Granted: November 29, 2012
Application Number:
20120299565
A control circuit for a switching regulator implements constant on-time control scheme with synchronous rectification and applies dual control loops to improve light load efficiency and enhance transient response. In one embodiment, the control circuit includes a first control loop configured to control a one-shot timer to generate a control signal to turn on the main switch when the feedback voltage is below a first reference voltage and a minimum off-time duration has expired. The…
VOLTAGE/CURRENT CONTROL APPARATUS AND METHOD
Granted: November 22, 2012
Application Number:
20120293144
A voltage/current control apparatus and method are disclosed. The apparatus includes a low-side field effect transistor (FET) having a source, a gate and a drain, a high-side field effect transistor (FET) having a source, a gate and a drain, a gate driver integrated circuit (IC), a sample and hold circuit, and a comparator configured to produce a trigger signal at the output when a sum of the first and second input signals is equal to a sum of the third and fourth input signals, wherein…
FABRICATION OF TRENCH DMOS DEVICE HAVING THICK BOTTOM SHIELDING OXIDE
Granted: November 22, 2012
Application Number:
20120292693
Semiconductor device fabrication method and devices are disclosed. A device may be fabricated by forming in a semiconductor layer; filling the trench with an insulating material; removing selected portions of the insulating material leaving a portion of the insulating material in a bottom portion of the trench; forming one or more spacers on one or more sidewalls of a remaining portion of the trench; anisotropically etching the insulating material in the bottom portion of the trench…
