THROTTLE VALVE AND FORELINE CLEANING USING A MICROWAVE SOURCE
Granted: December 7, 2023
Application Number:
20230390811
Exemplary semiconductor processing systems may include a processing chamber defining a processing region. The systems may include a foreline coupled with the processing chamber, the foreline defining a fluid conduit. The systems may include a radical generator having an inlet and an outlet. The outlet may be fluidly coupled with the foreline. The systems may include a gas source fluidly coupled with the inlet of the radical generator. The systems may include a throttle valve coupled with…
SPIN-ORBIT TORQUE MRAM STRUCTURE AND MANUFACTURE THEREOF
Granted: November 30, 2023
Application Number:
20230389441
Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by…
OLED ANODE STRUCTURES INCLUDING AMORPHOUS TRANSPARENT CONDUCTING OXIDES AND OLED PROCESSING METHOD COMPRISING THE SAME
Granted: November 30, 2023
Application Number:
20230389343
Exemplary methods of OLED device processing are described. The methods may include forming an anode on a substrate. Forming the anode may include forming a first metal oxide material on the substrate, forming a metal layer over the first metal oxide material, forming a protective barrier over the metal layer, and forming a second metal oxide material over the amorphous protection material. The protective barrier may be an amorphous protection material overlying the metal layer.
SELECTIVE METAL REMOVAL WITH FLOWABLE POLYMER
Granted: November 30, 2023
Application Number:
20230386833
Embodiments of the disclosure relate to methods for selectively removing metal material from the top surface and sidewalls of a feature. The metal material which is covered by a flowable polymer material remains unaffected. In some embodiments, the metal material is formed by physical vapor deposition resulting in a relatively thin sidewall thickness. Any metal material remaining on the sidewall after removal of the metal material from the top surface may be etched by an additional etch…
HIGHLY CONFORMAL METAL ETCH IN HIGH ASPECT RATIO SEMICONDUCTOR FEATURES
Granted: November 30, 2023
Application Number:
20230386830
Exemplary semiconductor processing methods may include providing an oxygen-containing precursor to a semiconductor processing chamber, where a substrate may be positioned. The substrate may include a trench formed between two columns and molybdenum-containing metal regions in a plurality of recesses formed in at least one of the columns. At least two of the molybdenum-containing metal regions may be connected by a molybdenum-containing first liner formed on at least a portion of a…
LOW TEMPERATURE SILICON OXIDE GAP FILL
Granted: November 30, 2023
Application Number:
20230386829
Embodiments of the disclosure relate to methods for forming silicon based gapfill within substrate features. A flowable silicon film is formed within the feature with a greater thickness on the bottom and top surfaces than the sidewall surface. An etch plasma removes the silicon film from the sidewall surface. A conversion plasma is used to convert the silicon film to a silicon based gapfill (e.g., silicon oxide). In some embodiments, the silicon film is preferentially converted on the…
GA IMPLANT PROCESS CONTROL FOR ENHANCED PARTICLE PERFORMANCE
Granted: November 30, 2023
Application Number:
20230386786
A method of reducing gallium particle formation in an ion implanter. The method may include performing a gallium implant process in the ion implanter, the gallium implant process comprising implanting a first dose of gallium ions from a gallium ion beam into a first set of substrates, while the first set of substrates are disposed in a process chamber of the beamline ion implanter. As such, a metallic gallium material may be deposited on one or more surfaces within a downstream portion…
SYSTEMS AND METHODS FOR OPTIMIZING FULL HORIZONTAL SCANNED BEAM DISTANCE
Granted: November 30, 2023
Application Number:
20230386785
Provided herein are approaches for optimizing a full horizontal scanned beam distance of an accelerator beam. In one approach, a method may include positioning a first Faraday cup along a first side of an intended beam-scan area, positioning a second Faraday cup along a second side of the intended beam-scan area, scanning an ion beam along the first and second sides of the intended beam-scan area, measuring a first beam current of the ion beam at the first Faraday cup and measuring a…
MOLYBDENUM(0) PRECURSORS FOR DEPOSITION OF MOLYBDENUM FILMS
Granted: November 30, 2023
Application Number:
20230382933
Molybdenum(0) and coordination complexes are described. Methods for depositing molybdenum-containing films on a substrate are described. The substrate is exposed to a molybdenum precursor and a reactant to form the molybdenum-containing film (e.g., elemental molybdenum, molybdenum oxide, molybdenum carbide, molybdenum silicide, molybdenum disulfide, molybdenum nitride). The exposures can be sequential or simultaneous.
EPITAXIAL SILICON CHANNEL GROWTH
Granted: November 23, 2023
Application Number:
20230380170
A three-dimensional NAND flash memory structure may include solid channel cores of epitaxial silicon that are grown directly from a silicon substrate reference. The alternating oxide-nitride material layers may be formed as a stack, and a channel hole may be etched through the material layers that extends down to the silicon substrate. A tunneling layer may be formed around the channel hole to contact the alternating material layers, and an epitaxial silicon core may be grown from the…
METHODS FOR PATTERNING SUBSTRATES TO ADJUST VOLTAGE PROPERTIES
Granted: November 23, 2023
Application Number:
20230377901
A method of forming a structure on a substrate is provided. The method includes depositing a dipole dopant containing (DDC) layer including a dipole dopant on a first and second region of a dielectric layer (DL) of the substrate. A hardmask (HM) is deposited over the DDC deposited on the first and the second regions. A patterned photoresist layer (PR) is formed over the HM. The PR includes a first portion that is positioned over the first region and an opening that is positioned to…
METHOD FOR DEPOSITING LAYERS DIRECTLY ADJACENT UNCOVERED VIAS OR CONTACT HOLES
Granted: November 23, 2023
Application Number:
20230377888
Disclosed are approaches for forming semiconductor device layers. One method may include forming a plurality of openings in a semiconductor structure, and forming a film layer atop the semiconductor structure by delivering a material at a non-zero angle relative to a normal extending perpendicular from an upper surface of the semiconductor structure. The film layer may be formed along the upper surface of the semiconductor structure without being formed along a sidewall of each opening…
BARRIER LAYER FOR PREVENTING ALUMINUM DIFFUSION
Granted: November 23, 2023
Application Number:
20230377879
Embodiments of the present disclosure are related to methods of preventing aluminum diffusion in a metal gate stack (e.g., high-? metal gate (HKMG) stacks and nMOS FET metal gate stacks). Some embodiments relate to a barrier layer for preventing aluminum diffusion into high-? metal oxide layers. The barrier layer described herein is configured to reduce threshold voltage (Vt) shift and reduce leakage in the metal gate stacks. Additional embodiments relate to methods of forming a metal…
DIRECTIONAL SELECTIVE DEPOSITION
Granted: November 23, 2023
Application Number:
20230377875
Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is seated. A bias power may be applied to the substrate support from a bias power source. The methods may include forming a…
DOSE MAPPING USING SUBSTRATE CURVATURE TO COMPENSATE FOR OUT-OF-PLANE DISTORTION
Granted: November 16, 2023
Application Number:
20230367941
A method may include generating a residual curvature map for a substrate, the residual curvature map being based upon a measurement of a surface of the substrate. The method may include generating a dose map based upon the residual curvature map, the dose map being for processing the substrate using a patterning energy source; and applying the dose map to process the substrate using the patterning energy source.
Etch Rate Modulation of FinFET Through High-Temperature Ion Implantation
Granted: November 16, 2023
Application Number:
20230369050
A method of forming a semiconductor device may include forming a plurality of fins extending from a buried oxide layer, wherein a masking layer is disposed atop each of the plurality of fins, and performing a high-temperature ion implant to the semiconductor device. The method may further include performing an etch process to remove the masking layer from atop each of the plurality of fins, wherein the etch process does not remove the buried oxide layer.
INTEGRATED METHOD AND TOOL FOR HIGH QUALITY SELECTIVE SILICON NITRIDE DEPOSITION
Granted: November 16, 2023
Application Number:
20230369031
Methods of manufacturing memory devices are provided. The method comprises pre-cleaning a top surface of a film stack, the film stack comprising alternating layers of a first material layer and a second material layer and having one or more of a memory hole and a slit pattern opening extending through the film stack; exposing the top surface of the film stack to a growth inhibitor; selectively depositing a silicon-containing dielectric layer in a region of the film stack; and densifying…
RECOMBINATION CHANNELS FOR ANGLE CONTROL OF NEUTRAL REACTIVE SPECIES
Granted: November 16, 2023
Application Number:
20230369022
Provided herein are approaches for angle control of neutral reactive species ion beams. In one approach, a workpiece processing apparatus may include a plasma source operable to generate a plasma within a plasma chamber enclosed by a chamber housing, and an extraction plate coupled to the chamber housing. The extraction plate may include a recombination array having a plurality of channels operable to direct one or more radical beams to a workpiece at a non-zero angle relative to a…
DOSE MAPPING AND SUBSTRATE ROTATION FOR SUBSTRATE CURVATURE CONTROL WITH IMPROVED RESOLUTION
Granted: November 16, 2023
Application Number:
20230369014
A method may include generating a residual curvature map for a substrate, the residual curvature map being based upon a measurement of the substrate. The method may include generating a dose map based upon the residual curvature map, the dose map being for processing the substrate using a patterning energy source. The method may include applying the dose map to process the substrate using the patterning energy source, wherein the dose map is applied by performing a plurality of exposures…
ANGLE CONTROL FOR NEUTRAL REACTIVE SPECIES GENERATED IN A PLASMA
Granted: November 16, 2023
Application Number:
20230369013
Provided herein are approaches for angle control of neutral reactive species ion beams. In one approach, a workpiece processing apparatus may include a plasma source operable to generate a plasma within a plasma chamber enclosed by a chamber housing, and an extraction plate coupled to the chamber housing. The extraction plate may include a plurality of channels for delivering one or more radical beams to a workpiece, wherein each of the plurality of channels has a lengthwise axis…
