3D MEMORY INCLUDING HOLLOW EPITAXIAL CHANNELS
Granted: June 6, 2024
Application Number:
20240188300
Disclosed are approaches for fabricating 3D NAND flash memory structures including hollow epitaxial channels. One approach for fabricating a 3D NAND memory structure may include forming a plurality of alternating material layers arranged in a vertical stack on a substrate, etching a channel hole that extends through the plurality of alternating material layers to the substrate, and forming a tunneling layer around the channel hole contacting the plurality of alternating material layers.…
HIGH-DENSITY MICRO-LED ARRAYS WITH REFLECTIVE SIDEWALLS
Granted: June 6, 2024
Application Number:
20240186458
Micro-LED structures include an LED epilayer that may be formed before the micro-LED structure is coupled to a backplane substrate. In order to prevent light leakage and maximize light output, the sidewalls and other surfaces of the LED epilayer may be coated with a reflective coating. For example, the reflective coating may include a metal layer that is electrically insulated between dielectric layers from the micro-LED electrodes. The reflective coating may also be formed using…
WORDLINE CONTACT FORMATION FOR NAND DEVICE
Granted: June 6, 2024
Application Number:
20240186178
Disclosed are approaches for direct wordline contact formation for 3-D NAND devices. One method may include providing a film stack including a plurality of alternating first layers and second layers, and forming a plurality of contact openings in the film stack, wherein each contact opening is formed to a different etch depth relative to an upper surface of the film stack. The method may further include depositing a liner over the film stack including within each of the contact openings,…
THERMAL CHOKE PLATE
Granted: June 6, 2024
Application Number:
20240186121
Exemplary choke plates for use in a substrate processing system may include a plate defining a first aperture through the plate and a second aperture through the plate. The second aperture may be laterally offset from the first aperture. The plate may include a flange that defines a purging inlet. The plate may include a rim defining a plurality of purging outlets that are fluidly coupled with the purging inlet. Each of the plurality of purging outlets may be fluidly coupled with the…
WORDLINE CONTACT FORMATION FOR NAND DEVICE
Granted: June 6, 2024
Application Number:
20240185893
Disclosed are approaches for direct wordline contact formation for 3D NAND devices. One method may include providing a first film stack comprising a first plurality of alternating first layers and second layers, and forming a first plurality of contact openings in the first film stack, wherein each contact opening is formed to a different etch depth. The method may further include forming a sacrificial gapfill within the first plurality of contact openings, and forming a second film…
SEMICONDUCTOR FILM THICKNESS PREDICTION USING MACHINE-LEARNING
Granted: June 6, 2024
Application Number:
20240185058
A machine-learning model may be used to estimate a film thickness from a spectral image captured from a semiconductor substrate during processing. Instead of using actual measurements from physical substrates to train the model, simulated images may be generated for a wide variety of predefined thickness profiles. Simulated training data may be rapidly generated by receiving a film thickness profile representing a film on a semiconductor substrate design. A light source may be simulated…
CONTROLLING LIGHT SOURCE WAVELENGTHS FOR SELECTABLE PHASE SHIFTS BETWEEN PIXELS IN DIGITAL LITHOGRAPHY SYSTEMS
Granted: June 6, 2024
Application Number:
20240184097
A digital lithography system may adjust a wavelength of the light source to compensate for tilt errors in micromirrors while maintaining a perpendicular direction for the reflected light. Adjacent pixels may have a phase shift that is determined by an optical path difference between their respective light beams. This phase shift may be preselected to be any value by generating a corresponding wavelength at the light source based on the optical path difference. To generate a specific…
AREA SELECTIVE DEPOSITION THROUGH SURFACE SILYLATION
Granted: June 6, 2024
Application Number:
20240183035
Methods of selectively depositing a selectively deposited layer are described. Exemplary processing methods may include treating a substrate comprising a non-hydroxyl-containing surface and a second surface with one or more of ozone, hydrogen peroxide, or a hydrogen plasma to passivate the second surface. In one or more embodiments, a selectively deposited layer is then selectively deposited on the non-hydroxyl-containing surface and not on the second surface by flowing a first precursor…
MULTI-PULSE DEPOSITION PROCESSES
Granted: June 6, 2024
Application Number:
20240183033
Embodiments of the present disclosure advantageously provide improved control over precursor/reactant pulse/purge time, greater growth per cycle, and higher throughput during formation of a metal-containing film on a substrate surface (including substrate surfaces having at least one feature) compared to traditional atomic layer deposition (ALD) processes. In some embodiments, forming the metal-containing film comprises exposing a substrate to a constant flow of an inert carrier gas and…
LINEAR ACCELERATOR ASSEMBLY INCLUDING FLEXIBLE HIGH-VOLTAGE CONNECTION
Granted: May 30, 2024
Application Number:
20240179828
Embodiments herein are directed to a linear accelerator assembly for an ion implanter. In some embodiments, a LINAC may include a coil resonator and a plurality of drift tubes coupled to the coil resonator by a set of flexible leads.
CALCULATE WAFERS THICKNESS OUT OF WAFER MAPPING PROCESS
Granted: May 30, 2024
Application Number:
20240178022
A method of operating a substrate processing system that includes a substrate processing chamber, a substrate storage container and robot configured to select a substrate from the substrate storage container and transfer a selected substrate into the substrate processing chamber, the method comprising: detecting a lower edge and upper edge of the substrate; calculating a thickness of the substrate based on the detected lower and upper edges of the substrate; comparing the calculated…
USING LASER BEAM FOR SEM BASE TOOLS, WORKING DISTANCE MEASUREMENT AND CONTROL WORKING DISTANCE SEM TO TARGET
Granted: May 30, 2024
Application Number:
20240177962
A system for processing a sample comprising: a vacuum chamber having a window formed along one of its walls; a sample support configured to hold a sample within the vacuum chamber during a sample processing operation and move the substrate within the vacuum chamber along the X, Y and Z axes; a charged particle beam column configured to direct a charged particle beam into the vacuum chamber and focus the beam to collide with a region of interest on the sample; an optical distance…
LOW RESISTIVITY GAPFILL
Granted: May 30, 2024
Application Number:
20240175120
Embodiments of the disclosure relate to methods for metal gapfill with lower resistivity. Specific embodiments provide methods of forming a tungsten gapfill without a high resistance nucleation layer. Some embodiments of the disclosure utilize a nucleation underlayer to promote growth of the metal gapfill.
Vertical FinFet Formation Using Directional Deposition
Granted: May 23, 2024
Application Number:
20240172419
Disclosed herein are approaches for forming contacts in a 4F2 vertical dynamic random-access memory device. One method includes forming a hardmask over a plurality of pillars and over a plurality of anchors, wherein the pillars are separated from one another by a STI, and removing the STI and etching through the hardmask to form a plurality of gate trenches. The method may further include delivering a capping material to the pillars at a non-zero angle relative to a perpendicular…
BATCH PROCESSING CHAMBERS FOR PLASMA-ENHANCED DEPOSITION
Granted: May 23, 2024
Application Number:
20240170254
Embodiments of the disclosure are directed to PEALD batch processing chambers. Some embodiments are directed to processing chambers having one or more inductively coupled plasma (ICP) coils electrically connected to at least one RF power source. Some embodiments are directed to processing chambers having a wafer cassette comprising a plurality of platforms, each platform configured to support at least one wafer for processing, and one or more RF power sources electrically connected to…
THREE LAYER RESONATOR COIL FOR LINEAR ACCELERATOR
Granted: May 23, 2024
Application Number:
20240170251
An ion implantation system including an ion source for generating an ion beam, an end station for holding a substrate to be implanted by the ion beam, and a linear accelerator disposed between the ion source and the end station and adapted to accelerate the ion beam, the linear accelerator including at least one acceleration stage including a resonator and a resonator coil disposed within a resonator chamber, wherein the resonator coil is a tubular body having a plurality of coaxial…
METHODS OF REMOVING METAL OXIDE USING CLEANING PLASMA
Granted: May 23, 2024
Application Number:
20240167148
Embodiments of the disclosure are directed to methods of removing metal oxide from a substrate surface by exposing the substrate surface to an un-biased cleaning plasma comprising a mixture of hydrogen (H2) and oxygen (O2). In some embodiments, the substrate surface has at least one feature thereon, the at least one feature defining a trench having a top surface, a bottom surface, and two opposed sidewalls. The un-biased cleaning plasma comprises in a range of from 1% to 20% oxygen (O2)…
Dynamic Phased Array Plasma Source For Complete Plasma Coverage Of A Moving Substrate
Granted: May 16, 2024
Application Number:
20240162020
Apparatus and methods to process a substrate comprising a gas distribution assembly comprising a plasma process region with an array of individual plasma sources. A controller is connected to the array of individual plasma sources and the substrate support. The controller is configured monitor the position of the at least one substrate and provide or disable power to the individual plasma sources based on the position of the substrate relative to the individual plasma sources.
PROCESS CELL FOR FILED GUIDED POST EXPOSURE BAKE PROCESS
Granted: May 16, 2024
Application Number:
20240160117
Apparatus and method for substrate processing are described herein. More specifically, the apparatus and method are directed towards apparatus and method for performing a field guided post exposure bake operation on a semiconductor substrate. The apparatus is a processing module (100) and includes an upper portion (102) with an electrode (400) and a base portion (104) which is configured to support a substrate (500) on a substrate support surface (159). The upper portion (102) and the…
PLASMA ASSISTED DAMAGE ENGINEERING DURING ION IMPLANTATION
Granted: May 9, 2024
Application Number:
20240153775
A method of method of treating a semiconductor substrate. The method may include, in a beamline ion implanter, exposing a substrate surface of the semiconductor substrate to a plasma clean and exposing the substrate surface to a hydrogen treatment from a plasma source. The method may further include, in the beamline ion implanter, exposing the substrate to an implant process after formation of the hydrogen passivation, wherein the substrate is maintained under vacuum over a process…
