SELECTIVE ETCHING BETWEEN SILICON-AND-GERMANIUM-CONTAINING MATERIALS WITH VARYING GERMANIUM CONCENTRATIONS
Granted: January 23, 2025
Application Number:
20250029841
Exemplary semiconductor processing methods may include providing a pre-treatment precursor to a processing region of a semiconductor processing chamber. A first layer of silicon-and-germanium-containing material and a second layer of silicon-and-germanium-containing material may be disposed on a substrate housed within the processing region. A native oxide may be present on the first layer and the second layer. The methods may include contacting the substrate with the pre-treatment…
INTEGRATED PLASMA CLEAN AND DIELECTRIC PASSIVATION DEPOSITION PROCESSES
Granted: January 23, 2025
Application Number:
20250029835
Exemplary semiconductor processing methods may include performing a treatment operation on a substrate housed within a first processing region of a first semiconductor processing chamber. The methods may include providing a nitrogen-containing precursor to the first processing region. The methods may include forming plasma effluents of the nitrogen-containing precursor. The methods may include contacting the substrate with the plasma effluents of the nitrogen-containing precursor. The…
HEATED METAL LID FOR SELECTIVE PECVD
Granted: January 23, 2025
Application Number:
20250029816
Gas distribution assemblies for a semiconductor manufacturing processing chamber comprising a first showerhead with a first flange and a second showerhead with a second flange. A first two-piece RF isolator comprises a first inner RF isolator spaced from a first outer RF isolator. The first inner RF isolator spaced from the first flange of the first showerhead to create a first flow path. A second two-piece RF isolator comprises a second inner RF isolator spaced from a second outer RF…
SEMICONDUCTOR CHEMICAL PRECURSOR WITH GAS PASSAGES
Granted: January 23, 2025
Application Number:
20250027199
Ampoules including a solid volume of the semiconductor chemical precursor and methods of use and manufacturing are described. The solid volume of the semiconductor chemical precursor includes an ingress opening, at least one flow channel, and an outlet passage that are in fluid communication with each other. The solid volume of the semiconductor manufacturing precursor is made of a porous or alternatively a non-porous material. A flow path is defined by at least one flow channel through…
PLASMA SYSTEM HAVING RESIDENCE TIME TUNING ASSEMBLY
Granted: January 16, 2025
Application Number:
20250022697
A plasma processing apparatus. The plasma processing apparatus may include a plasma chamber, to define a plasma therein, and an extraction aperture, arranged along a first side of the plasma chamber, the extraction aperture to define an ion beam extracted therethrough. The plasma processing apparatus may further include a residence time tuning assembly, coupled to a portion of the plasma chamber, different from the first side, wherein the residence time tuning assembly comprises a…
OLED ANODE STRUCTURES INCLUDING AMORPHOUS TRANSPARENT CONDUCTING OXIDES AND OLED PROCESSING METHOD COMPRISING THE SAME
Granted: January 16, 2025
Application Number:
20250024693
Exemplary methods of OLED device processing are described. The methods may include forming an anode on a substrate. Forming the anode may include forming a first metal oxide material on the substrate, forming a metal layer over the first metal oxide material, forming a protective barrier over the metal layer, and forming a second metal oxide material over the amorphous protection material. The protective barrier may be an amorphous protection material overlying the metal layer.
SOURCE CONTACT FOR 3D MEMORY WITH CMOS BONDED ARRAY
Granted: January 16, 2025
Application Number:
20250022935
Methods of manufacturing memory devices are provided. The method comprises forming a first epitaxial layer on a substrate; and forming a memory array on the first epitaxial layer, the memory array comprising a memory stack of alternating layers of an oxide material and a metal material on the first epitaxial layer, at least one memory cell extending from the first epitaxial layer through the memory stack, and a slit filled with a fill material adjacent to the at least one memory cell.
METHODS OF FORMING INTERCONNECT STRUCTURES
Granted: January 16, 2025
Application Number:
20250022750
Embodiments of the disclosure provide methods of forming interconnect structures in the manufacture of microelectronic devices. In one or more embodiments, microelectronic devices described herein comprise at least one top interconnect structure that is interconnected to at least one bottom interconnect structure. Embodiments of the disclosure relate to methods of improving barrier layer and metal liner properties in the interconnect structures without increasing capacitance and/or…
CYCLIC ETCH OF SILICON OXIDE AND SILICON NITRIDE
Granted: January 16, 2025
Application Number:
20250022714
Exemplary semiconductor processing methods may include flowing a fluorine-containing precursor and a hydrogen-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be positioned within the processing region. The substrate may include a trench formed through stacked layers including alternating layers of silicon nitride and silicon oxide. The methods may include forming plasma effluents of the fluorine-containing precursor and the…
DIRECTIONAL SELECTIVE FILL OF SILICON OXIDE MATERIALS
Granted: January 16, 2025
Application Number:
20250022704
Exemplary processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. The substrate may define a feature. The methods may include forming plasma effluents of the silicon-containing precursor. The methods may include depositing a silicon-containing material on the substrate. The methods may include providing an oxygen-containing precursor to the processing region,…
COOLING FRAME FOR DIFFUSER
Granted: January 16, 2025
Application Number:
20250019824
Exemplary substrate processing chambers may include a chamber body defining a processing region. The chambers may include a backing plate disposed atop the chamber body, a diffuser above the processing region and supported by the backing plate, and a cooling frame disposed between the backing plate and the diffuser. The cooling frame may be coupled with the diffuser. The cooling frame may include a body having one or more fluid inlets and one or more fluid outlets. The body may define an…
BIPOLAR ELECTROSTATIC CHUCK TO LIMIT DC DISCHARGE
Granted: January 9, 2025
Application Number:
20250014934
Exemplary support assemblies may include an electrostatic chuck body defining a support surface that defines a substrate seat. The assemblies may include a support stem coupled with the chuck body. The assemblies may include a heater embedded within the chuck body. The assemblies may include a first bipolar electrode embedded within the electrostatic chuck body between the heater and support surface. The assemblies may include a second bipolar electrode embedded within the chuck body…
METROLOGY SLOT PLATES
Granted: January 9, 2025
Application Number:
20250014922
Metrology slot plates, processing chamber lids and processing chambers having metrology slot plates are described. Each of the metrology slot plates independently comprises one or more of a plate blank, a reflectometer, a capacitance sensor, a gas flow meter, a manometer, a pyrometer, a distance sensor (laser) or an emissometer.
GASBOX FOR SEMICONDUCTOR PROCESSING CHAMBER
Granted: January 9, 2025
Application Number:
20250014914
Exemplary semiconductor processing chambers may include a gasbox including a first plate having a first surface and a second surface opposite to the first surface. The first plate of the gasbox may define a central aperture that extends from the first surface to the second surface. The first plate may define an annular recess in the second surface. The first plate may define a plurality of apertures extending from the first surface to the annular recess in the second surface. The gasbox…
VACUUM ENABLED GRIPPER WITH ROLLER CONTACT FINGERS
Granted: January 9, 2025
Application Number:
20250010496
The present disclosure describes a substrate gripping clamp. The substrate gripping clamp includes a clamp arm and a roller recess disposed therein. The substrate gripping clamp also includes a gripper disposed within the roller recess and coupled to the clamp arm. The gripper further includes a top bevel face, a bottom bevel face, and a mid roller face between the top bevel face and the bottom bevel face.
FACE-UP WAFER ELECTROCHEMICAL PLANARIZATION APPARATUS
Granted: January 2, 2025
Application Number:
20250001547
Exemplary substrate electrochemical planarization apparatuses may include a chuck body defining a substrate support surface. The apparatuses may include a retaining wall extending from the chuck body. The apparatuses may include an electrolyte delivery port disposed radially inward of the retaining wall. The apparatuses may include a spindle that is positionable over the chuck body. The apparatuses may include an end effector coupled with a lower end of the spindle. The end effector may…
INTEGRATED DIPOLE REGION FOR TRANSISTOR
Granted: January 2, 2025
Application Number:
20250006499
Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the disclosure advantageously provide electronic devices which comprise an integrated dipole region to meet reduced thickness and lower thermal budget requirements. The electronic devices described herein comprise a source region, a drain region, and a channel separating the source region and the drain region, and a dipole region having an interfacial layer, a metal film…
SELECTIVE DEPOSITION PROCESSES ON SEMICONDUCTOR SUBSTRATES
Granted: January 2, 2025
Application Number:
20250006485
Embodiments of the disclosure relate to methods of selectively depositing polysilicon after forming a flowable polymer film to protect a substrate surface within a feature. A first silicon (Si) layer is deposited by physical vapor deposition (PVD). The flowable polymer film is formed on the first silicon (Si) layer on the bottom. A portion of the first silicon (Si) layer is selectively removed from the top surface and the at least one sidewall. The flowable polymer film is removed. In…
MODULAR HEATING JACKET WITH REMOLDABLE INSULATOR
Granted: January 2, 2025
Application Number:
20250003076
Embodiments of the disclosure relate to heating jackets comprising a reformable insulator. The insulator may be shaped to conform to the shape of a vapor deposition precursor delivery system, or a portion thereof, and subsequently reformed to a different vapor deposition precursor delivery system, or a portion thereof. Some embodiments of the disclosure combine multiple heating modules to form a heating jacket. The heating modules contain a flexible heating element and an insulating,…
INTERFACE TUNING FOR EROSION AND CORROSION RESISTANT COATINGS FOR SEMICONDUCTOR COMPONENTS
Granted: January 2, 2025
Application Number:
20250003061
Exemplary processing methods may include providing a component for semiconductor processing to a processing region of a processing chamber. The methods may include providing one or more interface deposition precursors to the processing region. The methods may include depositing a layer of interface material on the component for semiconductor processing in the processing region. The methods may include providing one or more coating deposition precursors to the processing region. The…
