DIPOLE FORMATION PROCESSES
Granted: July 4, 2024
Application Number:
20240222195
Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the present disclosure advantageously provide methods of manufacturing electronic devices which meet reduced thickness, lower thermal budget, and Vt requirements, and have improved device performance and reliability. Advantageously, the embodiments of the present disclosure provide methods of manufacturing electronic devices that achieve desired dipole effect without an…
SELECTIVE METAL SELECTIVITY IMPROVEMENT WITH RF PULSING
Granted: July 4, 2024
Application Number:
20240222192
Embodiments of the disclosure are directed to methods of removing metal oxide from a substrate surface by exposing the substrate surface to a hydrogen (H2) plasma and pulses of RF. In some embodiments, the substrate surface has at least one feature thereon, the at least one feature defining a trench having a top surface, a bottom surface, and two opposed sidewalls. The hydrogen (H2) plasma and pulses of RF remove substantially all of the metal oxide, e.g., tungsten oxide (WOx),…
ELECTROPLATING GOLD PLATING SOLUTION AND USE THEREOF
Granted: July 4, 2024
Application Number:
20240218548
Embodiments of the present invention provide an electroplating gold plating solution and use thereof. The electroplating gold plating solution comprises a gold cyanide salt, a conductive salt, an oxalate, a lead-containing compound, and additives comprising a phenolic compound and/or gelatin. The general formula of the phenolic compound is as shown in the following formula (1): Wherein at least one of R1, R2, R3, R4, R5, and R6 is selected from hydroxyl, and the rest are each…
ELECTROLESS PLATING WITH A FLOATING POTENTIAL
Granted: July 4, 2024
Application Number:
20240218519
Exemplary methods of plating are described. The methods may include applying a floating potential to a plating bath in a plating chamber. The methods further include contacting a patterned substrate with the plating bath in the plating chamber. The patterned substrate includes at least one metal interconnect with a contact surface that is exposed to the plating bath. The metal interconnect is made of a first metal characterized by a first reduction potential. The methods further include…
PLASMA-ENHANCED MOLYBDENUM DEPOSITION
Granted: July 4, 2024
Application Number:
20240218502
Embodiments of the disclosure are directed to methods of depositing a molybdenum film directly on a substrate surface (e.g., a low-? dielectric material) by exposing the substrate surface to a molybdenum-containing precursor and an organosilane reducing agent at a temperature of less than or equal to 450° C. The molybdenum-containing precursor comprises one or more of molybdenum pentachloride (MoCl5), molybdenum dioxide dichloride (MoO2Cl2), molybdenum oxytetrachloride (MoOCl4),…
HOLE-TYPE SADP FOR 2D DRAM CAPACITOR
Granted: June 27, 2024
Application Number:
20240215223
Memory devices and methods of forming memory devices are described. Methods of forming electronic devices are described where a spacer is formed around each of the bit line contact pillars, the spacer in contact with the spacer of an adjacent bit line contact pillar. A doped layer is then epitaxially grown on the memory stack and bit line is formed on the memory stack. The bit line is self-aligned with the active region.
IN-LINE DEPTH MEASUREMENTS BY AFM
Granted: June 27, 2024
Application Number:
20240212976
A method of evaluating a region of interest of a sample with a sample evaluation tool that includes a focused ion beam (FIB) column, a scanning electron microscope (SEM) column, and an atomic force microscope (AFM) instrument, the method comprising: transferring the sample into in a vacuum chamber of the sample evaluation tool; acquiring a plurality of two-dimensional images of the region of interest over a plurality of iterations of a delayering process by: (a) positioning the region of…
TUNABLE HARDWARE TO CONTROL RADIAL FLOW DISTRIBUTION IN A PROCESSING CHAMBER
Granted: June 27, 2024
Application Number:
20240209506
Gas distribution assemblies comprising a backing plate, a first enclosure with an outer diameter smaller than an outer diameter of an opening in the center of the backing plate. A top plate is connected to the top of the first enclosure. A compressible seal surrounds the first enclosure connecting the top plate to the backing plate outside the opening in the backing plate. An actuator is connected to the backing plate and the top plate to move the top plate closer to and further from the…
AMPOULE FOR A SEMICONDUCTOR MANUFACTURING PRECURSOR
Granted: June 27, 2024
Application Number:
20240207838
Ampoules for a semiconductor manufacturing precursors and methods of use are described. The ampoules include a container with an inlet port and an outlet port. The ampoules comprise an inlet plenum located between the inlet port and the cavity and an outlet plenum located between the outlet port and the cavity. A flow path is defined by a plurality of tubular walls and a flow ingress openings of the ampoule adjacent bottom edges of the tubular walls, through which a carrier gas flows in…
CONFINED CHARGE TRAP LAYER
Granted: June 20, 2024
Application Number:
20240206172
Described is selective deposition of a silicon nitride (SiN) trap layer to form a memory device. A sacrificial layer is used for selective deposition in order to permit selective trap deposition. The trap layer is formed by deposition of a mold including a sacrificial layer, memory hole (MH) patterning, sacrificial layer recess from MH side, forming a deposition-enabling layer (DEL) on a side of the recess, and selective deposition of trap layer. After removing the sacrificial layer from…
METHOD FOR PRECISION OXIDATION CONTROL BY ION IMPLANTATION
Granted: June 20, 2024
Application Number:
20240203743
A method of processing a semiconductor substrate, including performing a first ion implantation process on the substrate, wherein a first ion beam formed of an ionized first dopant species is directed at a top surface of the substrate and is blocked from a first portion of the substrate while being allowed to implant a second portion of the substrate, and performing a second ion implantation process on the substrate, wherein a second ion beam formed of an ionized second dopant species is…
LOW TEMPERATURE DEPOSITION OF IRIDIUM CONTAINING FILMS
Granted: June 20, 2024
Application Number:
20240200188
Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.
MULTILAYER INNER SPACER FOR GATE-ALL-AROUND DEVICE
Granted: June 13, 2024
Application Number:
20240194757
Semiconductor devices (e.g., gate-all-around (GAA) devices), process tools for manufacturing GAA devices and methods of manufacturing GAA devices and multilayer inner spacers for GAA devices are described. The multilayer inner spacer comprises an inner layer, a middle layer, and an outer layer within a superlattice structure formed on a top surface of a substrate. The superlattice structure has a plurality of semiconductor material layers (e.g., silicon germanium (SiGe)) and a…
METAL BASED HYDROGEN BARRIER
Granted: June 13, 2024
Application Number:
20240194526
A method of forming an electronic device is disclosed. The method comprises forming depositing a metal on a substrate, the metal comprising one or more of copper (Cu), titanium (Ti), or tantalum (Ta). A metal cap is deposited on the metal. The metal cap comprises one or more of molybdenum (Mo), ruthenium (Ru), iridium (Ir), rhodium (Rh), palladium (Pd), silver (Ag), osmium (Os), platinum (Pt), or gold (Au). The substrate is then exposed to an anneal process, e.g., a hydrogen…
Selective Implantation into STI of ETSOI Device
Granted: June 13, 2024
Application Number:
20240194518
Disclosed herein are approaches for forming a shallow trench isolation (STI) to improve extremely thin silicon on insulator (ETSOI) device performance. In one approach, a method may include providing a device stack comprising a buried oxide (BOX) layer in a substrate, patterning a hardmask over the substrate, and forming a plurality of isolation regions in the device stack, wherein the plurality of isolation regions extend through the box layer and the substrate. The method may further…
ION EXTRACTION OPTICS HAVING NOVEL BLOCKER CONFIGURATION
Granted: June 13, 2024
Application Number:
20240194438
A processing system may include a plasma chamber and an extraction optics, disposed along a side of the plasma chamber. The extraction optics may include an extraction plate, having an outer side and an inner side, where the extraction plate defines at least one extraction aperture. The extraction optics may include a beam blocker, overlapping the at least one extraction aperture, and disposed towards the inner side of the extraction plate. The beam blocker may have a cross-section that…
ELECTROCHEMICAL REDUCTION OF SURFACE METAL OXIDES
Granted: June 13, 2024
Application Number:
20240191353
Embodiments of the disclosure relate to methods for reducing metal oxide layers to pure metal using microwave radiation. Specific embodiments provide methods of reducing a native metal oxide on a metal interconnect within a substrate feature comprising dielectric sidewalls. In some embodiments, surrounding dielectric materials are undamaged by the disclosed processes.
AREA SELECTIVE DEPOSITION THROUGH SURFACE SILYLATION
Granted: June 6, 2024
Application Number:
20240183035
Methods of selectively depositing a selectively deposited layer are described. Exemplary processing methods may include treating a substrate comprising a non-hydroxyl-containing surface and a second surface with one or more of ozone, hydrogen peroxide, or a hydrogen plasma to passivate the second surface. In one or more embodiments, a selectively deposited layer is then selectively deposited on the non-hydroxyl-containing surface and not on the second surface by flowing a first precursor…
WORDLINE CONTACT FORMATION FOR NAND DEVICE
Granted: June 6, 2024
Application Number:
20240185893
Disclosed are approaches for direct wordline contact formation for 3D NAND devices. One method may include providing a first film stack comprising a first plurality of alternating first layers and second layers, and forming a first plurality of contact openings in the first film stack, wherein each contact opening is formed to a different etch depth. The method may further include forming a sacrificial gapfill within the first plurality of contact openings, and forming a second film…
SEMICONDUCTOR FILM THICKNESS PREDICTION USING MACHINE-LEARNING
Granted: June 6, 2024
Application Number:
20240185058
A machine-learning model may be used to estimate a film thickness from a spectral image captured from a semiconductor substrate during processing. Instead of using actual measurements from physical substrates to train the model, simulated images may be generated for a wide variety of predefined thickness profiles. Simulated training data may be rapidly generated by receiving a film thickness profile representing a film on a semiconductor substrate design. A light source may be simulated…
