Substrate transfer devices, systems and methods of use thereof
Granted: March 18, 2025
Patent Number:
12251830
The disclosure describes devices, systems and methods relating to a transfer chamber for an electronic device processing system. For example, a method includes causing a robot arm to pick up a substrate. The robot arm is caused to pick up the substrate by causing a first mover to rotate or to change a first distance to a second mover. Rotation of the first mover or the change in the first distance causes the first robot arm to rotate about a shoulder axis. The robot arm is further caused…
Robot apparatus, systems, and methods for transporting substrates in electronic device manufacturing
Granted: March 18, 2025
Patent Number:
12255089
Electronic device manufacturing systems, robot apparatus and associated methods are described. The robot apparatus includes an arm having an inboard end and an outboard end, the inboard end is configured to rotate about a shoulder axis; a first forearm is configured for independent rotation relative to the arm about an elbow axis at the outboard end of the arm; a first wrist member is configured for independent rotation relative the first forearm about a first wrist axis at a distal end…
Support device for supporting a substrate, method of processing a substrate and semiconductor substrate
Granted: March 18, 2025
Patent Number:
12255088
A support device includes a substrate receiving region. The support device includes a support body shaped as a pattern having an array of openings. The support body is a sparse structure wherein a joint area of the openings of the array of openings is 40% or more of the area of the substrate receiving region. The support body includes one or more suction openings configured to be in fluid communication with a vacuum source arrangement.
Method for depositing layers directly adjacent uncovered vias or contact holes
Granted: March 18, 2025
Patent Number:
12255067
Disclosed are approaches for forming semiconductor device layers. One method may include forming a plurality of openings in a semiconductor structure, and forming a film layer atop the semiconductor structure by delivering a material at a non-zero angle relative to a normal extending perpendicular from an upper surface of the semiconductor structure. The film layer may be formed along the upper surface of the semiconductor structure without being formed along a sidewall of each opening…
Integrated cleaning process for substrate etching
Granted: March 18, 2025
Patent Number:
12255055
A method for removing etchant byproduct from an etch reactor and discharging a substrate from an electrostatic chuck of the etch reactor is provided. One or more layers on a substrate electrostatically secured to an electrostatic chuck within a chamber of the etch reactor is etched using a first plasma, causing an etchant byproduct to be generated. A portion of the one or more layers are covered by a photoresist. After the etching is complete, a second plasma is provided into the chamber…
Methods to eliminate of deposition on wafer bevel and backside
Granted: March 18, 2025
Patent Number:
12255054
Exemplary semiconductor processing chambers include a chamber body defining a processing region. The chambers may include a substrate support disposed within the processing region. The substrate support may have an upper surface that defines a recessed substrate seat. The chambers may include a shadow ring disposed above the substrate seat and the upper surface. The shadow ring may extend about a peripheral edge of the substrate seat. The chambers may include bevel purge openings defined…
Multi-shape voltage pulse trains for uniformity and etch profile tuning
Granted: March 18, 2025
Patent Number:
12255051
Embodiments of the disclosure provided herein include a method for processing a substrate in a plasma processing system. The method includes receiving a first synchronization waveform signal from a controller, delivering a first burst of first voltage pulses to an electrode assembly after receiving a first portion of the first synchronization waveform signal, wherein at least one first parameter of the first voltage pulses is set to a first value based on a first waveform parameter…
Reducing backscattered electron induced errors
Granted: March 18, 2025
Patent Number:
12254602
A method for improving a quality of a secondary electron image of a region of a sample, the method may include obtaining a backscattered electron (BSE) image of the region and a secondary electron (SE) image of the region; wherein the BSE image and the SE image are generated by scanning of the region with an electron beam; processing the BSE image and the SE image to provide a processed BSE image and a processed SE image; and generating a BSE compensated SE image, wherein the generating…
Multi-level RF pulse monitoring and RF pulsing parameter optimization at a manufacturing system
Granted: March 18, 2025
Patent Number:
12253476
Methods and systems for RF pulse monitoring and RF pulsing parameter optimization at a manufacturing system are provided. Sensor data is received from one or more sensors that indicates an RF pulse waveform detected within the processing chamber. One or more RF signal characteristics are identified in the detected RF pulse waveform. Each identified RF signal characteristic corresponds to at least one RF signal pulse of the RF signal pulsing within the processing chamber. A determination…
Methods for in-situ chamber monitoring
Granted: March 18, 2025
Patent Number:
12252779
Methods for monitoring process chambers using a controllable plasma oxidation process followed by a controlled reduction process and metrology are described. In some embodiments, the metrology comprises measuring the reflectivity of the metal oxide film formed by the controllable plasma oxidation process and the reduced metal film or surface modified film formed by reducing the metal oxide film.
Modular chemical mechanical polisher with simultaneous polishing and pad treatment
Granted: March 18, 2025
Patent Number:
12251787
The present disclosure is directed towards polishing modules for performing chemical mechanical polishing of a substrate. The substrate may be a semiconductor substrate. The polishing modules described have a plurality of pads, such as polishing pads, disposed within a single polishing station. The pads are configured to remain stationary during processing, such as during polishing or buff operations. Either an x-y gantry assembly or a head actuation assembly is coupled to a system body…
Baffle for anti-rotation process kit for substrate processing chamber
Granted: March 11, 2025
Patent Number:
D1066275
Prediction of electrical properties of a semiconductor specimen
Granted: March 11, 2025
Patent Number:
12250503
There is provided a method and a system configured to obtain metrology data Dmetrology informative of a plurality of structural parameters of a semiconductor specimen, obtain a model informative of a relationship between at least some of said structural parameters and one or more electrical properties of the specimen, use the model and Dmetrology to determine, for at least one given electrical property of the specimen, one or more given structural parameters among the plurality of…
Arsenic diffusion profile engineering for transistors
Granted: March 11, 2025
Patent Number:
12249626
Embodiments of the present disclosure relate to methods for forming a source/drain extension. In one embodiment, a method for forming an nMOS device includes forming a gate electrode and a gate spacer over a first portion of a semiconductor fin, removing a second portion of the semiconductor fin to expose a side wall and a bottom, forming a silicon arsenide (Si:As) layer on the side wall and the bottom, and forming a source/drain region on the Si:As layer. During the deposition of the…
Substrate flipping in vacuum for dual sided PVD sputtering
Granted: March 11, 2025
Patent Number:
12249537
A module of a processing system for flipping a substrate in vacuum includes a clamp assembly for securing the substrate, a first motor assembly coupled to the clamp assembly for rotating the clamp assembly, and a second motor assembly coupled to the first motor assembly for raising and lowering the first motor assembly and the clamp assembly.
Using spectroscopic measurements for substrate temperature monitoring
Granted: March 11, 2025
Patent Number:
12249525
Systems, methods, and computer-readable mediums for monitoring temperature of a substrate are described. Spectroscopic measurements are performed on a surface of the substrate using a metrology tool integrated with a processing tool. The measurements may be used to determine that the substrate has cooled below a threshold temperature using the spectroscopic measurements.
Processing chamber with annealing mini-environment
Granted: March 11, 2025
Patent Number:
12249522
Apparatus and methods to process one or more wafers are described. The apparatus comprises a chamber defining an upper interior region and a lower interior region. A heater assembly is on the bottom of the chamber body in the lower interior region and defines a process region. A wafer cassette assembly is inside the heater assembly and a motor is configured to move the wafer cassette assembly from the lower process region inside the heater assembly to the upper interior region.
Selective deposition of carbon on photoresist layer for lithography applications
Granted: March 11, 2025
Patent Number:
12249509
A method for etching a hardmask layer includes forming a photoresist layer comprising an organometallic material on a hardmask layer comprising a metal-containing material, exposing the photoresist layer to ultraviolet radiation through a mask having a selected pattern, removing un-irradiated areas of the photoresist layer to pattern the photoresist layer, forming a passivation layer comprising a carbon-containing material selectively on a top surface of the patterned photoresist layer,…
Patterned heater pedestal with groove extensions
Granted: March 11, 2025
Patent Number:
D1066620
Process chamber pumping liner
Granted: March 11, 2025
Patent Number:
D1066440
