Methods and mechanisms for adjusting process chamber parameters during substrate manufacturing
Granted: February 25, 2025
Patent Number:
12235624
An electronic device manufacturing system capable of obtaining metrology data generated using metrology equipment located within a process chamber that performs a deposition process on a substrate according to a process recipe, wherein the process recipe comprises a plurality of setting parameters, and wherein the deposition process generates a plurality of film layers on a surface of the substrate. The manufacturing system can further generate a correction profile based on the metrology…
Print process for color conversion layer using porous host or positive photoresist
Granted: February 25, 2025
Patent Number:
12237445
A method of fabricating a multi-color display includes forming a host matrix over a display having an array of light emitting diodes. The host matrix is sensitive to ultraviolet light. A first plurality of light emitting diodes in a first plurality of wells are activated to illuminate a portion of the host matrix to cause the portion of the host matrix to develop internal porous structures. A first photo-curable fluid including a first color conversion agent is dispensed. The first…
Plasma treatment on metal-oxide TFT
Granted: February 25, 2025
Patent Number:
12237406
Techniques are disclosed for methods of post-treating an etch stop or a passivation layer in a thin film transistor to increase the stability behavior of the thin film transistor.
Lift pin interface in a substrate support
Granted: February 25, 2025
Patent Number:
12237200
Methods and apparatus for lift pin interfaces for electrostatic chucks are provided herein. In some embodiments, a lift pin interface in an electrostatic chuck includes: a dielectric plate having a support surface for a substrate; a conductive plate disposed beneath the dielectric plate and having an opening formed therethrough, wherein the dielectric plate includes a protrusion extending into the opening in the conductive plate; and a lift pin guide disposed in the opening, wherein the…
On-board cleaning of tooling parts in hybrid bonding tool
Granted: February 25, 2025
Patent Number:
12237186
Methods and apparatus for cleaning tooling parts in a substrate processing tool are provided herein. In some embodiments, a method of cleaning tooling parts in a substrate processing tool includes placing one or more dirty tools on a holder in a bonding chamber of a multi-chamber processing tool; transferring the holder from the bonding chamber to a cleaning chamber of the multi-chamber processing tool; cleaning the one or more dirty tools in the cleaning chamber to produce one or more…
Etch feedback for control of upstream process
Granted: February 25, 2025
Patent Number:
12237158
A substrate processing system comprises an etch chamber configured to perform an etch process on a substrate, the etch chamber comprising an optical sensor to generate one or more optical measurements of a film on the substrate during and/or after the etch process. The system further comprises a computing device operatively connected to the etch chamber, wherein the computing device is to: receive the one or more optical measurements of the film; determine, for each optical measurement…
Reducing aspect ratio dependent etch with direct current bias pulsing
Granted: February 25, 2025
Patent Number:
12237149
Embodiments of the present disclosure generally relate to a system used in a semiconductor device manufacturing process. More specifically, embodiments provided herein generally include apparatus and methods for synchronizing and controlling the delivery of an RF bias signal and a pulsed voltage waveform to one or more electrodes within a plasma processing chamber. The apparatus and methods disclosed herein can be useful to at least minimize or eliminate a microloading effect created…
Determining a depth of a hidden structural element background
Granted: February 25, 2025
Patent Number:
12237146
A method for determining a depth of a hidden structural element of an object, the method may include (i) obtaining contrast information regarding a contrast between (a) hidden structural element detection signals that are indicative of electrons emitted from the hidden structural element, and (b) surroundings detection signals that are indicative of electrons emitted from a surroundings of the hidden structural element; wherein the hidden structural element detection signals and the…
In-line metrology systems, apparatus, and methods for optical devices
Granted: February 25, 2025
Patent Number:
12236575
Embodiments of the present disclosure relate to optical devices for augmented, virtual, and/or mixed reality applications. In one or more embodiments, an optical device metrology system is configured to measure a plurality of first metrics and one or more second metrics for optical devices, the one or more second metrics including a display leakage metric.
Methods and mechanisms for generating virtual knobs for model performance tuning
Granted: February 25, 2025
Patent Number:
12236077
An electronic device manufacturing system configured to receive, by a processor, input data reflecting a feature related to a manufacturing process of a substrate. The manufacturing system is further configured to train a machine-learning model based on the input data reflecting the feature. The manufacturing system is further configured to modify the machine-learning model in view of the virtual knob for the feature.
Micro-electromechanical device for use in a flow control apparatus
Granted: February 25, 2025
Patent Number:
12235144
Disclosed herein are embodiments of a sensor device, systems incorporating the same, and methods of fabricating the same. In one embodiment, a sensor device comprises a free-standing sensing element, such as a micro-electromechanical system (MEMS) device. The sensor device further comprises a metallic band to facilitate mounting the MEMS device to a mounting plate. The sensor device further comprises a conformal coating on a least a portion of a sensor region of the sensor device.
Method of in situ ceramic coating deposition
Granted: February 25, 2025
Patent Number:
12234549
Methods for in situ seasoning of process chamber components, such as electrodes are described. In an embodiment, the method includes depositing a silicon oxide film over the process chamber component and converting the silicon oxide film to a silicon-carbon-containing film. The silicon-carbon-containing film forms a protective film over the process chamber components and is resistant to plasma processing and/or dry etch cleaning. The coatings has high density, good emissivity control,…
Method of performing screen printing on a substrate used for the manufacture of a solar cell, controller and apparatus for performing same
Granted: February 25, 2025
Patent Number:
12233656
A method of performing screen printing on a substrate used for the manufacture of a solar cell is provided. The method includes moving a print head over a screen by a first drive actuator to perform a printing stroke in a first direction. The method includes moving a material processing head in the first direction by a second drive actuator to perform a material processing stroke behind the print head. The print head is moved away from the material processing head by the first drive…
Polishing system with capacitive shear sensor
Granted: February 25, 2025
Patent Number:
12233505
A polishing pad includes a sensor assembly surrounded by a lower portion of the polishing pad, and an upper portion including a pad portion disposed on the assembly and at least a portion of a polishing layer disposed on the lower portion. The sensor assembly includes a lower body having a first pair of electrodes formed thereon, a polymer body having a second pair of electrodes formed thereon and aligned with the first pair of electrodes, and a pair of gaps between the first pair of…
Ultraviolet and ozone cleaning apparatus and method of using
Granted: February 25, 2025
Patent Number:
12233441
A cleaning apparatus for cleaning a substrate wherein the substrate is contacted with ozonated water and irradiating the substrate and the ozonated water with UV electromagnetic radiation from a UV lamp within a cleaning chamber; wherein greater than or equal to about 50% of the UV electromagnetic radiation has a wavelength of greater than or equal to about 280 nm. Methods of cleaning a substrate are also presented.
Grounding ring of a process kit for semiconductor substrate processing
Granted: February 25, 2025
Patent Number:
D1064005
Method for non-contact low substrate temperature measurement
Granted: February 18, 2025
Patent Number:
12230521
A method and apparatus for measuring a temperature of a substrate located in a semiconductor processing environment is disclosed. The substrate has a top surface and an edge surface, and is positioned in a prescribed location within the semiconductor processing environment. An infrared camera oriented to view one side of the edge surface of the substrate is triggered to obtain an infrared image of the one side of the edge surface of the substrate. The infrared image is processed to…
Methods and apparatus for cooling a substrate support
Granted: February 18, 2025
Patent Number:
12232299
Methods and apparatus for processing a substrate are provided herein. For example, an apparatus for processing a substrate comprises a process chamber configured to process a substrate, a substrate support comprising a heat sink configured to cool the substrate support during operation and a water trap panel comprising a pumping ring configured to cool the water trap panel such that the water trap panel condenses water vapor molecules and drops a process chamber pressure during…
Three dimensional device formation using early removal of sacrificial heterostructure layer
Granted: February 18, 2025
Patent Number:
12230691
A method for forming a nanosheet device. The method may include providing a heterostructure device stack above a semiconductor substrate. The method may include patterning the heterostructure device stack to define a dummy gate region, and before forming a source drain recess adjacent the dummy gate region, selectively removing a first set of sacrificial layers of the heterostructure device stack within the dummy gate region.
MOSFET gate engineerinng with dipole films
Granted: February 18, 2025
Patent Number:
12230688
A metal gate stack on a substrate comprises: an interfacial layer on the substrate; a high-? metal oxide layer on the interfacial layer, the high-? metal oxide layer comprising a dipole region adjacent to the interfacial layer, the dipole region comprising niobium (Nb); a high-? metal oxide capping layer on the high-? metal oxide layer; a positive metal-oxide-semiconductor (PMOS) work function material above the high-? metal oxide capping layer; and a gate electrode above the PMOS work…
