Integrated Silicon Solution Profile

Integrated Silicon Solution Patent Grants

Clocked commands timing adjustments method in synchronous semiconductor integrated circuits

Patent Number 10236042 - March 19, 2019

A method in a clocked integrated circuit receiving an input clock signal having a clock frequency and a command signal for accessing a memory…

Memory device read training method

Patent Number 10229743 - March 12, 2019

A memory device implements a memory read training method using a dedicated read command to retrieve training data from a register for…

Method for forming flash memory unit

Patent Number 10170597 - January 1, 2019

A method for forming flash memory units is provided. After a logic gate in a select gate PMOS transistor area is separated from a logic gate…

Calibration circuit for on-chip drive and on-die termination

Patent Number 10103731 - October 16, 2018

Calibration circuits and methods to set an on-chip impedance to match a target impedance where the reference voltage does not equal one-half…

Clocked commands timing adjustments in synchronous semiconductor integrated circuits

Patent Number 10068626 - September 4, 2018

A clock timing adjust circuit is incorporated in a clocked integrated circuit to detect an input clock frequency and to adjust the timing…

Integrated Silicon Solution Patent Applications

METHOD FOR IMPROVING SENSING MARGIN OF RESISTIVE MEMORY

Application Number 20150348624 - December 3, 2015

A method in a resistive memory device includes configuring two or more memory cells in a column of the array sharing the same bit line and the…

DRAM ERROR CORRECTION EVENT NOTIFICATION

Application Number 20150331745 - November 19, 2015

A method in a memory device implementing error correction includes setting an error correction event register to a first value; assessing a…

FLASH MEMORY DEVICE WITH SENSE-AMPLIFIER-BYPASSED TRIM DATA READ

Application Number 20150279473 - October 1, 2015

A non-volatile memory device includes a two-dimensional array of non-volatile memory cells where a first portion of memory cells being…

REFERENCE CURRENT CIRCUIT WITH TEMPERATURE COEFFICIENT CORRECTION

Application Number 20150270006 - September 24, 2015

A flash memory device uses a pair of parallely connected NMOS transistors with different voltage ratings to generate the reference current for…

ABRIDGED ERASE VERIFY METHOD FOR FLASH MEMORY

Application Number 20150221388 - August 6, 2015

A non-volatile memory device includes a control circuit configured to perform a block erase operation including a block erase cycle and an…

Integrated Silicon Solution Federal District Court Decisions

Goodman v. Intel Corporation et al

California Northern District Court - April 19, 2012

STIPULATED PROTECTIVE ORDER. Signed by Judge Maxine M. Chesney on April 19, 2012. (mmclc2, COURT STAFF) (Filed on 4/19/2012)

Goodman v. Intel Corporation et al

California Northern District Court - March 26, 2012

ORDER EXTENDING TIME FOR EXCHANGE OF PRELIMINARY CLAIM CONSTRUCTIONS AND EXTRINSIC EVIDENCE PURSUANT TO PATEN L.R. 4-2. Signed by Judge…

Goodman v. Intel Corporation et al

California Northern District Court - March 12, 2012

ORDER RE DISMISSAL OF CLAIMS AGAINST INTEL CORPORATION WITH PREJUDICE. Signed by Judge Maxine M. Chesney on March 12, 2012. (mmclc2, COURT…

Goodman v. Intel Corporation et al

California Northern District Court - March 6, 2012

ORDER EXTENDING TIME FOR DEFENDANT ISSI TO SERVE P.R. 3-3 INVALIDITY CONTETIONS. Signed by Judge Maxine M. Chesney on March 6, 2012. (mmclc2,…

Goodman v. Intel Corporation et al

California Northern District Court - February 1, 2012

ORDER FOR STIPULATED CONDITIONAL DISMISSAL AS TO INTEL CORPORATION. Signed by Judge Maxine M. Chesney on February 1, 2012. (mmclc2, COURT…