Side-channel exploit detection
Granted: March 11, 2025
Patent Number:
12248570
The present disclosure is directed to systems and methods for detecting side-channel exploit attacks such as Spectre and Meltdown. Performance monitoring circuitry includes first counter circuitry to monitor CPU cache misses and second counter circuitry to monitor DTLB load misses. Upon detecting an excessive number of cache misses and/or load misses, the performance monitoring circuitry transfers the first and second counter circuitry data to control circuitry. The control circuitry…
Techniques to detect attacks for time synchronization networking
Granted: March 11, 2025
Patent Number:
12250233
Techniques include a method, apparatus, system and computer-readable medium to detect, quantify and localize attacks to enhance security for time-synchronized networking. Embodiments include a diagnostic stream producer to produce diagnostic information providing evidence of a timing attack on a node of a time-synchronized network. Embodiments include a diagnostic stream consumer to consume diagnostic information, analyze the diagnostic information, and determine whether a node is under…
Deterministic packet scheduling and DMA for time sensitive networking
Granted: March 11, 2025
Patent Number:
12250163
In one embodiment, a network interface controller (NIC) includes multiple packet transmission queues to queue data packets for transmission. The data packets are assigned to multiple traffic classes. The NIC also includes multiple input/output (I/O) interfaces for retrieving the data packets from memory. Each I/O interface is assigned to a subset of the traffic classes. The NIC also includes scheduler circuitry to select a first data packet to be retrieved from memory, and direct memory…
Phase locked loop assisted fast start-up apparatus and method
Granted: March 11, 2025
Patent Number:
12249997
An apparatus and method are provided to re-configure an existing low-jitter phase locked loop (PLL) circuit for fast start-up during system wake-up. During system start-up, a feed-back path of the PLL is disconnected to independently control the VCO frequency. This independently controlled VCO then injects energy into a resonator (e.g., a crustal oscillator) for its fast start-up. Once a resonance frequency of the resonator is detected and an oscillation builds up in the resonator, a VCO…
Thermal contacts at periphery of integrated circuit packages
Granted: March 11, 2025
Patent Number:
12249553
Present disclosure relates to IC packages with integrated thermal contacts. In some embodiments, an IC package includes a package substrate, an IC die that is coupled to the package substrate, and at least one thermal contact for coupling to at least a portion of a heat exchanger, where the thermal contact is limited to being in a region located at a periphery of the IC package. In some embodiments, thermal contacts are such that at least a portion of a heat exchanger is to be attached…
Encoding additional states in a three-dimensional crosspoint memory architecture
Granted: March 11, 2025
Patent Number:
12249372
A state may be encoded into a memory cell comprising a phase change material (PM) region and a select device (SD) region by: applying a first current in the memory cell over a first time period, wherein the first current applied over the first time period causes the PM region of the memory cell to be placed into an amorphous state and the SD region of the memory cell to be placed into an amorphous state; and applying a second current in the memory cell over a second time period after the…
Dynamic power adjustment for OLED panels
Granted: March 11, 2025
Patent Number:
12249297
Methods and systems for dynamically adjusting the power consumption of an organic light-emitting diode (OLED) panel are disclosed. In embodiments, a histogram of a frame to be displayed is generated, and a weighted dimming curve is generated, with heavier weighting given to mid-tone intensity pixels. High and low intensity pixels are left only minimally adjusted. The curve is then capped and smoothed to prevent artifacts and to preserve image contrast. Each pixel in the frame is then…
Methods, apparatus, systems, and instructions to migrate protected virtual machines
Granted: March 11, 2025
Patent Number:
12248807
Techniques for migration of a source protected virtual machine from a source platform to a destination platform are descried. A method of an aspect includes enforcing that bundles of state, of a first protected virtual machine (VM), received at a second platform over a stream, during an in-order phase of a migration of the first protected VM from a first platform to the second platform, are imported to a second protected VM of the second platform, in a same order that they were exported…
Frequency scaling for per-core accelerator assignments
Granted: March 11, 2025
Patent Number:
12248783
Methods for frequency scaling for per-core accelerator assignments and associated apparatus. A processor includes a CPU (central processing unit) having multiple cores that can be selectively configured to support frequency scaling and instruction extensions. Under this approach, some cores can be configured to support a selective set of AVX instructions (such as AVX3/5G-ISA instructions) and/or AMX instructions, while other cores are configured to not support these AVX/AMX instructions.…
Techniques to repurpose static random access memory rows to store a look-up-table for processor-in-memory operations
Granted: March 11, 2025
Patent Number:
12248696
Example compute-in-memory (CIM) or processor-in-memory (PIM) techniques using repurposed or dedicated static random access memory (SRAM) rows of an SRAM sub-array to store look-up-table (LUT) entries for use in a multiply and accumulate (MAC) operation.
Apparatus and method for role-based register protection for TDX-IO
Granted: March 11, 2025
Patent Number:
12248561
Apparatus and method for role-based register protection. For example, one embodiment of an apparatus comprises: one or more processor cores to execute instructions and process data, the one or more processor cores to execute one or more security instructions to protect a virtual machine or trusted application from a virtual machine monitor (VMM) or operating system (OS); an interconnect fabric to couple the one or more processor cores to a device; and security hardware logic to determine…
Functional safety with root of safety and chain of safety
Granted: March 11, 2025
Patent Number:
12248304
A data verifier, comprising: a first processing circuitry, configured to perform a first safety operation, the first safety operation comprising: determining whether first sensor data representing a second processing circuitry factor satisfy a first verification criterion; and if first verification criterion is satisfied, execute a first safety measure; and if the first verification criterion is not satisfied, execute a second safety measure; a second processing circuitry, configured to…
Similar boot time for multiple displays
Granted: March 4, 2025
Patent Number:
12242859
Particular embodiments described herein provide for an electronic device that includes two or more displays and a BIOS. On startup, before the premem state and MRC initialization of the boot process, the BIOS causes power to be enabled to two or more displays. A display engine determines if a hot plug for each display is asserted and for each display where the hot plug was not asserted, the path to the display where the hot plug was not asserted is closed. In an example, the BIOS…
Compression and interleaving of spatially proximate data
Granted: March 4, 2025
Patent Number:
12243155
Methods, systems and apparatuses may provide for technology that identifies first graphics data that is associated with spatially proximate positions. The technology identifies second graphics data that is associated with spatially proximate positions, and interleaves the first and the second graphics data across a plurality of storage tiles.
Controlling coarse pixel size from a stencil buffer
Granted: March 4, 2025
Patent Number:
12243125
Systems, apparatuses and methods may provide for technology that determines a stencil value and uses the stencil value to control, via a stencil buffer, a coarse pixel size of a graphics pipeline. Additionally, the stencil value may include a first range of bits defining a first dimension of the coarse pixel size and a second range of bits defining a second dimension of the coarse pixel size. In one example, the coarse pixel size is controlled for a plurality of pixels on a per pixel…
Methods and arrangements for a personal point of sale device
Granted: March 4, 2025
Patent Number:
12243037
Logic to register a personal point of sale (POS) device. Logic may communicate with the registration processor to establish a secure communication channel. Logic may access a basic input output system to obtain platform information. Logic may transmit the platform information to the registration processor to identify a certification associated with the device. Logic may communicate with a payment instrument via a card reader. Logic may transmit an encrypted message from the card reader…
Graph context-based operator checks to improve graph clustering and execution in AI accelerator framework integration
Granted: March 4, 2025
Patent Number:
12242973
Systems, apparatuses and methods may provide for technology that parses, at runtime, a deep learning graph in topological order to identify a plurality of nodes, marks a first set of nodes in the plurality of nodes as unsupported by target hardware, and marks a second set of nodes in the plurality of nodes as supported by the target hardware, wherein the first set of nodes and the second set of nodes are marked based on one or more attributes defining operation functionality, and wherein…
Methods and apparatus to optimize workflows
Granted: March 4, 2025
Patent Number:
12242889
Methods, apparatus, systems and articles of manufacture are disclosed that optimize workflows. An example apparatus includes an intent determiner to determine an objective of a user input, the objective indicating a task to be executed in an infrastructure, a configuration composer to compose a plurality of workflows based on the determined objective, a model executor to execute a machine learning model to create a confidence score relating to the plurality of workflows, and a workflow…
Multiple secure virtual processors for a trust domain
Granted: March 4, 2025
Patent Number:
12242875
Providing multiple virtual processors (VPs) for a trusted domain (TD) includes creating a virtual processor control structure (VPCS) for one or more of a plurality of VPs of the TD of a processor in a computing system, the TD including a trust domain control structure (TDCS), the plurality of VPs having views into addresses of private memory of the TD, the VPCS for a VP including a secure extended page table (SEPT) for the VP; and for the VP, initializing the VPCS for the VP by copying…
Methods and apparatus to load data within a machine learning accelerator
Granted: March 4, 2025
Patent Number:
12242861
Methods, apparatus, systems, and articles of manufacture to load data into an accelerator are disclosed. An example apparatus includes data provider circuitry to load a first section and an additional amount of compressed machine learning parameter data into a processor engine. Processor engine circuitry executes a machine learning operation using the first section of compressed machine learning parameter data. A compressed local data re-user circuitry determines if a second section is…
