Intel Patent Grants

Cooperative adaptive cruise control (CACC) system for control of connected and autonomous vehicle (CAV) platoons

Granted: March 4, 2025
Patent Number: 12243429
Techniques are disclosed to increase the safety of vehicles travelling in a vehicle platoon. These techniques include the utilization of a comprehensive safety framework such as a safety driving model (SDM) for the platoon control systems. In contrast to the conventional approaches, the use of the SDM model allows for platoon vehicle control systems to consider the acceleration/deceleration capabilities of the vehicles to calculate minimum safe longitudinal distances between the platoon…

Video smoothing mechanism

Granted: March 4, 2025
Patent Number: 12243192
An apparatus to facilitate video motion smoothing is disclosed. The apparatus comprises one or more processors including a graphics processor, the one or more processors including circuitry configured to receive a video stream, decode the video stream to generate a motion vector map and a plurality of video image frames, analyze the motion vector map to detect a plurality of candidate frames, wherein the plurality of candidate frames comprise a period of discontinuous motion in the…

Compression and interleaving of spatially proximate data

Granted: March 4, 2025
Patent Number: 12243155
Methods, systems and apparatuses may provide for technology that identifies first graphics data that is associated with spatially proximate positions. The technology identifies second graphics data that is associated with spatially proximate positions, and interleaves the first and the second graphics data across a plurality of storage tiles.

Systems and methods for implementing an intelligent application program interface for an intelligent optimization platform

Granted: February 25, 2025
Patent Number: 12236287
Systems and methods for implementing an application programming interface (API) that controls operations of a machine learning tuning service for tuning a machine learning model for improved accuracy and computational performance includes an API that is in control communication the tuning service that: executes a first API call function that includes an optimization work request that sets tuning parameters for tuning hyperparameters of a machine learning model; and initializes an…

Circuits and methods for supply voltage detection and timing monitoring

Granted: February 25, 2025
Patent Number: 12237832
A detection circuit includes a tunable delay circuit that generates a delayed signal and that receives a supply voltage. The detection circuit includes a control circuit that adjusts a delay provided by the tunable delay circuit to the delayed signal. The detection circuit includes a time-to-digital converter circuit that converts the delay provided by the tunable delay circuit to the delayed signal to a digital code and adjusts the digital code based on changes in the supply voltage.…

Method and apparatus to perform a read of a column in a memory accessible by row and/or by column

Granted: February 25, 2025
Patent Number: 12237040
A memory accessed by rows and/or by columns in which an array of bits can be physically stored in multi-bit wide columns in physically contiguous rows is provided. A multi-bit wide logical column is arranged diagonally across (M/multi-bits) physical rows and (M/multi-bits) physical columns with each of the plurality of multi-bit wide logical columns in the logical row stored in a different physical row and physical multi-bit column.

Dynamic detection and dynamic adjustment of sub-threshold swing in a memory cell sensing circuit

Granted: February 25, 2025
Patent Number: 12237023
For a nonvolatile (NV) storage media such as NAND media that is written by a program and program verify operation, the system can determine an expected number of SSPC (selective slow programming convergence) cells for a page of cells for specific conditions of the page. The system can perform program verify with a first wordline (WL) select voltage for SSPC cell detection for a first write of the page to detect the expected number of SSPC cells. Based on the determined expected number of…

Collective perception service enhancements in intelligent transport systems

Granted: February 25, 2025
Patent Number: 12236779
The present disclosure is related to Intelligent Transport Systems (ITS), and in particular, to service dissemination basic services (SDBS) and/or collective perception service (CPS) of an ITS Station (ITS-S). Implementations of how the SDBS and/or CPS is arranged within the facilities layer of an ITS-S, different conditions for service dissemination messages (SDMs) and/or collective perception message (CPM) dissemination, and format and coding rules of the SDM/CPS generation are…

Apparatus and method for ray tracing instruction processing and execution

Granted: February 25, 2025
Patent Number: 12236519
An apparatus and method to execute ray tracing instructions. For example, one embodiment of an apparatus comprises execution circuitry to execute a dequantize instruction to convert a plurality of quantized data values to a plurality of dequantized data values, the dequantize instruction including a first source operand to identify a plurality of packed quantized data values in a source register and a destination operand to identify a destination register in which to store a plurality of…

Generation and storage of compressed Z-planes in graphics processing

Granted: February 25, 2025
Patent Number: 12236498
Generation and storage of compressed z-planes in graphics processing is described. An example of a processor includes a rasterizer to generate a fragment of pixel data including blocks of pixel data; a depth pipeline to receive the fragment, the pipeline including a first and second depth test hardware, the first depth test hardware to perform a coarse depth test including determining minimum and maximum depths for each block; and a depth buffer, wherein the processor is to determine…

Autonomous machine collaboration

Granted: February 25, 2025
Patent Number: 12233552
A device including a processor configured to detect an environment of an automated machine, wherein the environment comprises one or more further automated machines; determine an action taken by the one or more further automated machines; determine an action expected of the one or more further automated machines; compares the taken action with the expected action; determine an accuracy score associated with the one or more further automated machines based on the comparison.

Computing system resource usage accounting and usage limit enforcement

Granted: February 25, 2025
Patent Number: 12236272
Resource access control modules that are part of an operating system kernel and data structures visible in both user space and kernel space provide for user space-based configuration of computing system resource limits, accounting of resource usage, and enforcement of resource usage limits. Computing system resource limits can be set on an application, customer, or other basis, and usage limits can be placed on various system resources, such as files, ports, I/O devices, memory, and…

Apparatuses and methods for speculative execution side channel mitigation

Granted: February 25, 2025
Patent Number: 12236243
Methods and apparatuses relating to mitigations for speculative execution side channels are described. Speculative execution hardware and environments that utilize the mitigations are also described. For example, three indirect branch control mechanisms and their associated hardware are discussed herein: (i) indirect branch restricted speculation (IBRS) to restrict speculation of indirect branches, (ii) single thread indirect branch predictors (STIBP) to prevent indirect branch…

Systems and methods to load a tile register pair

Granted: February 25, 2025
Patent Number: 12236242
Embodiments detailed herein relate to systems and methods to load a tile register pair. In one example, a processor includes: decode circuitry to decode a load matrix pair instruction having fields for an opcode and source and destination identifiers to identify source and destination matrices, respectively, each matrix having a PAIR parameter equal to TRUE; and execution circuitry to execute the decoded load matrix pair instruction to load every element of left and right tiles of the…

Programmable spatial array for matrix decomposition

Granted: February 25, 2025
Patent Number: 12235793
Programmable spatial array processing circuitry may be programmable to perform multiple different types of matrix decompositions. The programmable spatial array processing circuitry may include an array of processing elements. When programmed with a first instructions, the array performs a first type of matrix decomposition. When programmed with second instructions, the array performs a second type of matrix decomposition. Individual processing elements of the programmable spatial array…

Loop driven region based frontend translation control for performant and secure data-space guided micro-sequencing

Granted: February 25, 2025
Patent Number: 12235791
Methods and apparatus relating to loop driven region based frontend translation control for performant and secure data-space guided micro-sequencing are described. In an embodiment, Data-space Translation Logic (DTL) circuitry receives a static input and a dynamic input and generates one or more outputs based at least in part on the static input and the dynamic input. A frontend counter generates a count value for the dynamic input based at least in part on an incremented/decremented…

Dynamic USB-C mode selection OSPM policy method and apparatus

Granted: February 25, 2025
Patent Number: 12235780
A scheme to enhance USB-C port policy by dynamically entering optimal USB-C alternate mode with an informed feedback mechanism to OSPM which influences the USB-C port DPM. In some embodiments, when a USB4 device is connected to a port, the scheme parses the alternate modes and power characteristics from the class descriptor information of the enumerated device. In some embodiments, the parsed information is provided as a feedback to the OSPM that instructs the USB-C/PD DPM to enter or…

Controller for locking of selected cache regions

Granted: February 25, 2025
Patent Number: 12235761
Examples provide an application program interface or manner of negotiating locking or pinning or unlocking or unpinning of a cache region by which an application, software, or hardware. A cache region can be part of a level-1, level-2, lower or last level cache (LLC), or translation lookaside buffer (TLB) are locked (e.g., pinned) or unlocked (e.g., unpinned). A cache lock controller can respond to a request to lock or unlock a region of cache or TLB by indicating that the request is…

Adaptive error correction to improve system memory reliability, availability, and serviceability (RAS)

Granted: February 25, 2025
Patent Number: 12235720
A memory subsystem includes memory devices with space dynamically allocated for improvement of reliability, availability, and serviceability (RAS) in the system. Error checking and correction (ECC) logic detects an error in all or a portion of a memory device. In response to error detection, the system can dynamically perform one or more of: allocate active memory device space for sparing to spare a failed memory segment; write a poison pattern into a failed cacheline to mark it as…

Electronic device interconnect

Granted: February 25, 2025
Patent Number: 12235691
An electronic device may include a substrate having a substrate body. The electronic device may include a first interconnect region, for example located proximate to a first end of the substrate. The first interconnect region may extend from the substrate body. The first interconnect region may include a first set of interconnects, and the first set of interconnects may be located proximate to the substrate body. The first interconnect region may include a second set of interconnects,…