Compression and interleaving of spatially proximate data
Granted: March 4, 2025
Patent Number:
12243155
Methods, systems and apparatuses may provide for technology that identifies first graphics data that is associated with spatially proximate positions. The technology identifies second graphics data that is associated with spatially proximate positions, and interleaves the first and the second graphics data across a plurality of storage tiles.
Quantum dot devices with fins
Granted: March 4, 2025
Patent Number:
12245523
Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a substrate and a quantum well stack disposed on the substrate. The quantum well stack may include a quantum well layer and a back gate, and the back gate may be disposed between the quantum well layer and the substrate.
Trusted and connected multi-domain node clusters
Granted: March 4, 2025
Patent Number:
12244601
A system includes an orchestrator to receive a first request for resources for a workload of a tenant and to select a first node cluster in a first compute domain to be provisioned for the workload. The system also includes a first security manager to run in a trusted execution environment of one or more processors to receive attestation results for a second node cluster from a second security manager in a second compute domain, and to establish the first node cluster and the second node…
Encoder and decoder of forward error correction (FEC) codec
Granted: March 4, 2025
Patent Number:
12244326
A FEC codec for generating a check byte for a message. The FEC codec includes a port encoder having a storage unit, a Galois field multiplier, and a sum unit. The storage unit stores a first staged result, which is accumulated based on previous sets of input byte of the message for all clock cycles from a first clock cycle to a clock cycle immediately prior to the current clock cycle. The Galois field multiplier performs a Galois field multiplication of the first staged result and a…
Fan out packaging pop mechanical attach method
Granted: March 4, 2025
Patent Number:
12243856
Embodiments include semiconductor packages and a method of forming the semiconductor packages. A semiconductor package includes a mold over and around a first die and a first via. The semiconductor package has a conductive pad of a first redistribution layer disposed on a top surface of the first die and/or a top surface of the mold. The semiconductor package includes a second die having a solder ball coupled to a die pad on a bottom surface of the second die, where the solder ball of…
Microelectronic structures including bridges
Granted: March 4, 2025
Patent Number:
12243792
Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.
Method and apparatus for improving write uniformity in a memory device
Granted: March 4, 2025
Patent Number:
12243590
In one embodiment, an apparatus comprises a memory comprising a group of memory cells coupled to a wordline; and a controller configured to skip programming of one or more pages of the group of memory cells responsive to a sequential write operation; and program the one or more pages of the group of memory cells responsive to one or more random write commands.
Method and system of neural network dynamic noise suppression for audio processing
Granted: March 4, 2025
Patent Number:
12243545
A method and system of neural network dynamic noise suppression is provided for audio processing.
Glare and occluded view compensation for automotive and other applications
Granted: March 4, 2025
Patent Number:
12243496
Often when there is a glare on a display screen the user may be able to mitigate the glare by tilting or otherwise moving the screen or changing their viewing position. However, when driving a car there are limited options for overcoming glares on the dashboard, especially when you are driving for a long distance in the same direction. Embodiments are directed to eliminating such glare. Other embodiments are related to mixed reality (MR) and filling in occluded areas.
Video smoothing mechanism
Granted: March 4, 2025
Patent Number:
12243192
An apparatus to facilitate video motion smoothing is disclosed. The apparatus comprises one or more processors including a graphics processor, the one or more processors including circuitry configured to receive a video stream, decode the video stream to generate a motion vector map and a plurality of video image frames, analyze the motion vector map to detect a plurality of candidate frames, wherein the plurality of candidate frames comprise a period of discontinuous motion in the…
Integrating voltage regulators and passive circuit elements with top side power planes in stacked die architectures
Granted: March 4, 2025
Patent Number:
12242290
In one embodiment, an apparatus includes a first die with voltage regulator circuitry and a second die with logic circuitry. The apparatus further includes an inductor, a capacitor, and a conformal power delivery structure on the top side of the apparatus, where the voltage regulator circuitry is connected to the logic circuitry through the inductor, the capacitor, and the conformal power delivery structure. The conformal power delivery structure includes a first electrically conductive…
Controlling coarse pixel size from a stencil buffer
Granted: March 4, 2025
Patent Number:
12243125
Systems, apparatuses and methods may provide for technology that determines a stencil value and uses the stencil value to control, via a stencil buffer, a coarse pixel size of a graphics pipeline. Additionally, the stencil value may include a first range of bits defining a first dimension of the coarse pixel size and a second range of bits defining a second dimension of the coarse pixel size. In one example, the coarse pixel size is controlled for a plurality of pixels on a per pixel…
Methods and arrangements for a personal point of sale device
Granted: March 4, 2025
Patent Number:
12243037
Logic to register a personal point of sale (POS) device. Logic may communicate with the registration processor to establish a secure communication channel. Logic may access a basic input output system to obtain platform information. Logic may transmit the platform information to the registration processor to identify a certification associated with the device. Logic may communicate with a payment instrument via a card reader. Logic may transmit an encrypted message from the card reader…
Graph context-based operator checks to improve graph clustering and execution in AI accelerator framework integration
Granted: March 4, 2025
Patent Number:
12242973
Systems, apparatuses and methods may provide for technology that parses, at runtime, a deep learning graph in topological order to identify a plurality of nodes, marks a first set of nodes in the plurality of nodes as unsupported by target hardware, and marks a second set of nodes in the plurality of nodes as supported by the target hardware, wherein the first set of nodes and the second set of nodes are marked based on one or more attributes defining operation functionality, and wherein…
Multiple secure virtual processors for a trust domain
Granted: March 4, 2025
Patent Number:
12242875
Providing multiple virtual processors (VPs) for a trusted domain (TD) includes creating a virtual processor control structure (VPCS) for one or more of a plurality of VPs of the TD of a processor in a computing system, the TD including a trust domain control structure (TDCS), the plurality of VPs having views into addresses of private memory of the TD, the VPCS for a VP including a secure extended page table (SEPT) for the VP; and for the VP, initializing the VPCS for the VP by copying…
Methods and apparatus to load data within a machine learning accelerator
Granted: March 4, 2025
Patent Number:
12242861
Methods, apparatus, systems, and articles of manufacture to load data into an accelerator are disclosed. An example apparatus includes data provider circuitry to load a first section and an additional amount of compressed machine learning parameter data into a processor engine. Processor engine circuitry executes a machine learning operation using the first section of compressed machine learning parameter data. A compressed local data re-user circuitry determines if a second section is…
Similar boot time for multiple displays
Granted: March 4, 2025
Patent Number:
12242859
Particular embodiments described herein provide for an electronic device that includes two or more displays and a BIOS. On startup, before the premem state and MRC initialization of the boot process, the BIOS causes power to be enabled to two or more displays. A display engine determines if a hot plug for each display is asserted and for each display where the hot plug was not asserted, the path to the display where the hot plug was not asserted is closed. In an example, the BIOS…
Verifying compressed stream fused with copy or transform operations
Granted: March 4, 2025
Patent Number:
12242851
Methods and apparatus relating to verifying a compressed stream fused with copy or transform operation(s) are described. In an embodiment, compression logic circuitry compresses input data and stores the compressed data in a temporary buffer. The compression logic circuitry determines a first checksum value corresponding to the compressed data stored in the temporary buffer. Decompression logic circuitry performs a decompress-verify operation and a copy operation. The decompress-verify…
Reduced network load with combined put or get and receiver-managed offset
Granted: March 4, 2025
Patent Number:
12242753
Methods and apparatus for reduced network load with receiver-managed offset (RMO) PUT or GET messages. An RMO PUT message including an RMO key, data, and a length is sent from an initiator to a target, where the RMO key is extracted by a Network Interface controller (NIC), SmartNIC, or Infrastructure Processing Unit and used to identify an address or address offset of a memory buffer in a target memory at which to write the data. An RMO GET message is sent from an initiator to a target…
Power supply optimization based on interface card power enable signaling
Granted: March 4, 2025
Patent Number:
12242319
An interface card includes a circuit board, a device mounted on the circuit board, and a PMIC mounted on the circuit board. The PMIC includes a PMIC processor communicatively coupled to a host processor of a host system. The PMIC processor is configured to receive an input voltage signal from a power supply that is external to the interface card. The PMIC processor generates at least one output voltage signal based on the input voltage signal. The at least one output voltage signal is…
