Mobility-as-a-service for user experience
Granted: March 25, 2025
Patent Number:
12260467
Systems and techniques for mobility-as-a-service for user experience are described herein. An orchestration log may be maintained that includes current orchestration data. An orchestration backup record may be generated that includes alternate MaaS nodes on the MaaS network. It may be determined that connectivity is lost to a first orchestration container hosted by a first MaaS node. An orchestration container is generated using the orchestration log to maintain orchestration…
Selectively applied protective layer on exposed materials of electronic circuit board and electronic components disposed thereon for immersion bath cooled systems
Granted: March 25, 2025
Patent Number:
12262478
An apparatus is described. The electronic circuit board having electronic components thereon. A protective material coated on an exposed material of the electronic circuit board and the electronic components. The protective material being chemically inert with the exposed material. The protective material being chemically inert with an immersion bath cooling liquid that the electronic circuit board and the electronic components are to be immersed within. A thermal cooling structure of…
Enhanced traffic indications for multi-link wireless communication devices
Granted: March 25, 2025
Patent Number:
12262243
This disclosure describes systems, methods, and devices related to traffic indications for multi-link devices (MLDs). A device may generate a first traffic indication map (TIM) with a first bitmap including a first indication that traffic is to be sent by a first access point (AP) device of the MLD to a first non-AP device of a second MLD using a first communication link. The device may generate a second TIM with a second bitmap including a second indication that no traffic is to be sent…
Creating, using, and managing protected cryptography keys
Granted: March 25, 2025
Patent Number:
12261941
System, method, and apparatus embodiments for creating, using, and managing protected cryptography keys are described. In an embodiment, an apparatus includes a decoder, an execution unit, and a cache. The decoder is to decode a single instruction into a decoded single instruction, the single instruction having a first source operand to specify encrypted data and a second source operand to specify a handle including a first including ciphertext of an encryption key, an integrity tag, and…
Technologies for real-time updating of encryption keys
Granted: March 25, 2025
Patent Number:
12261936
Techniques for real-time updating of encryption keys are disclosed. In the illustrative embodiment, an encrypted link is established between a local and remote processor over a point-to-point interconnect. The encrypted link is operated for some time until the encryption key should be updated. The local processor sends a key update message to the remote processor notifying the remote processor of the change. The remote processor prepares for the change and sends a key update confirmation…
Metallization stacks with self-aligned staggered metal lines
Granted: March 25, 2025
Patent Number:
12261114
Methods for fabricating metallization stacks with one or more self-aligned staggered metal lines, and related semiconductor devices, are disclosed. Methods and devices are based on providing a spacer material conformal to bottom metal lines of a first layer of a metallization stack. By carefully designing parameters of the deposition process, the spacer material may be deposited in such a manner that, for each pair of adjacent bottom metal lines of the first layer, an opening in the…
Thermal management in integrated circuit packages
Granted: March 25, 2025
Patent Number:
12261097
Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.
Methods and apparatus to implement parallel architectures for neural network classifiers
Granted: March 25, 2025
Patent Number:
12260630
Methods, apparatus, systems, and articles of manufacture are disclosed to implement parallel architectures for neural network classifiers. An example non-transitory computer readable medium comprises instructions that, when executed, cause a machine to at least: process a first stream using first neural network blocks, the first stream based on an input image; process a second stream using second neural network blocks, the second stream based on the input image; fuse a result of the…
Learning neural reflectance shaders from images
Granted: March 25, 2025
Patent Number:
12260483
Described herein are techniques for learning neural reflectance shaders from images. A set of one or more machine learning models can be trained to optimize an illumination latent code and a set of reflectance latent codes for an object within a set of input images. A shader can then be generated based on a machine learning model of the one or more machine learning models. The shader is configured to sample the illumination latent code and the set of reflectance latent codes for the…
Apparatus and method for managing data bias in a graphics processing architecture
Granted: March 25, 2025
Patent Number:
12260470
An apparatus and method are described for managing data which is biased towards a processor or a GPU. For example, an apparatus comprises a processor comprising one or more cores, one or more cache levels, and cache coherence controllers to maintain coherent data in the one or more cache levels; a graphics processing unit (GPU) to execute graphics instructions and process graphics data, wherein the GPU and processor cores are to share a virtual address space for accessing a system…
Technologies for on-circuit board de-embedding
Granted: March 25, 2025
Patent Number:
12259430
Technologies for on-circuit board de-embedding are disclosed. In the illustrative embodiment, several micromechanical relays on a circuit board can connect a trace on the circuit board to an open circuit, a closed circuit, a load circuit, or a through circuit. For the through circuit, the trace is connected to an integrated circuit component mounted on the circuit board. A cable is connected to the trace, allowing for signals to be sent to any of the four circuits without any probes…
Methods, systems, articles of manufacture and apparatus to map workloads
Granted: March 25, 2025
Patent Number:
12260323
Methods, apparatus, systems and articles of manufacture are disclosed to map workloads. An example apparatus includes a constraint definer to define performance characteristic targets of the neural network, an action determiner to apply a first resource configuration to candidate resources corresponding to the neural network, a reward determiner to calculate a results metric based on (a) resource performance metrics and (b) the performance characteristic targets, and a layer map…
Diamondoid materials in quantum computing devices
Granted: March 25, 2025
Patent Number:
12260296
Disclosed herein are diamondoid materials in quantum computing devices, as well as related methods, devices, and materials. For example, in some embodiments, a quantum computing device may include: qubit circuitry, an interconnect in conductive contact with the qubit circuitry, and a dielectric material proximate to the interconnect, wherein the dielectric material includes a diamondoid film.
Probabilistic contextual inference using RFID tag-interactions
Granted: March 25, 2025
Patent Number:
12260284
Techniques are disclosed for performing RFID motion tracking in an intelligent manner that facilitates the generation of accurate and useful metrics for marketing and other applications. The techniques function to reduce problematic false positive rates on RFID tags attached to items to improve the accuracy of the motion presence of a small subset of browsed items among a much larger set of tagged items in the same space. This accurate motion inference enables the calculation of metrics…
Technologies for offloading acceleration task scheduling operations to accelerator sleds
Granted: March 25, 2025
Patent Number:
12260257
Technologies for offloading acceleration task scheduling operations to accelerator sleds include a compute device to receive a request from a compute sled to accelerate the execution of a job, which includes a set of tasks. The compute device is also to analyze the request to generate metadata indicative of the tasks within the job, a type of acceleration associated with each task, and a data dependency between the tasks.
Technologies for storage and processing for distributed file systems
Granted: March 25, 2025
Patent Number:
12260127
Techniques for storage and processing for distributed file systems are disclosed. In the illustrative embodiment, padding is placed between data elements in a file to be stored on a distributed file system. The file is to be split into several objects in order to be stored in the distributed file system, and the padding is used to prevent a data element from being split across two different objects. The objects are stored on data nodes, which analyze the objects to determine which data…
Peer-influenced enhanced USB power delivery
Granted: March 25, 2025
Patent Number:
12259836
Universal Serial Bus (USB) Power Delivery is augmented by allowing devices that attach to the USB to include and/or have access to an enhanced device policy manager (eDPM) so that device information such as status, state, or requirements, such as power requirements, may be at least be shared by the eDPMs between, for example, a host device on the bus, a secondary device providing power to devices on the bus, and a new device attaching to the bus. Sharing device information facilitates…
Disaggregation of computing devices using enhanced retimers with circuit switching
Granted: March 25, 2025
Patent Number:
12259835
An apparatus may comprise multiplexing circuitry to select an ingress lane from among a plurality of ingress lanes to couple to an egress lane; and retiming circuitry to retime a signal received on the selected ingress lane and transmit the retimed signal on the egress lane.
Uncorrectable memory error prediction
Granted: March 25, 2025
Patent Number:
12259777
A system can predict memory device failure through identification of correctable error patterns based on the memory architecture. The failure prediction can thus account for the circuit-level of the memory rather than the mere number or frequency of correctable errors. A failure prediction engine correlates hardware configuration of the memory device with correctable errors (CEs) detected in data of the memory device to predict an uncorrectable error (UE) based on the correlation.
Selection of power supply for a host system
Granted: March 25, 2025
Patent Number:
12259768
In an embodiment, a host system for selecting a power supply includes a processor, a bus interface to connect to a peripheral device, and a power controller. The power controller may be to: determine whether the processor has entered a reduced power mode; determine, via one or more bus messages, whether charging is to be performed for a battery of the peripheral device; and in response to a determination that the processor has entered the reduced power mode and that charging is not to be…
