METHOD AND APPARATUS FOR ELECTROPLATING
Granted: February 25, 2010
Application Number:
20100044236
An apparatus for electroplating a layer of metal onto the surface of a wafer includes an ionically resistive ionically permeable element located in close proximity of the wafer and an auxiliary cathode located between the anode and the ionically resistive ionically permeable element. The ionically resistive ionically permeable element serves to modulate ionic current at the wafer surface. The auxiliary cathode is configured to shape the current distribution from the anode. The provided…
METHODS FOR GROWING LOW-RESISTIVITY TUNGSTEN FILM
Granted: February 11, 2010
Application Number:
20100035427
Improved methods for depositing low resistivity tungsten films are provided. The methods involve depositing a tungsten nucleation layer on a substrate and then depositing a tungsten bulk layer over the tungsten nucleation layer to form the tungsten film. The methods provide precise control of the nucleation layer thickness and improved step coverage. According to various embodiments, the methods involve controlling thickness and/or improving step coverage by exposing the substrate to…
High Resistance Ionic Current Source
Granted: February 11, 2010
Application Number:
20100032304
A substantially uniform layer of a metal is electroplated onto a work piece having a seed layer thereon. This is accomplished by employing a “high resistance ionic current source,” which solves the terminal problem by placing a highly resistive membrane (e.g., a microporous ceramic or fretted glass element) in close proximity to the wafer, thereby swamping the system's resistance. The membrane thereby approximates a constant current source. By keeping the wafer close to the membrane…
Modulated metal removal using localized wet etching
Granted: February 4, 2010
Application Number:
20100029088
An apparatus for wet etching metal from a semiconductor wafer comprises a wafer holder for rotating a wafer and a plurality of nozzles for applying separate flow patterns of etching liquid to the surface of the wafer. The flow patterns impact the wafer in distinct band-like impact zones. The flow pattern of etching liquid from at least one nozzle is modulated during a total etching time control the cumulative etching rate in one local etch region relative to the cumulative etching rate…
Wet Etching Methods for Copper Removal and Planarization in Semiconductor Processing
Granted: January 21, 2010
Application Number:
20100015805
Exposed copper regions on a semiconductor substrate can be etched by a wet etching solution comprising (i) one or more complexing agents selected from the group consisting of bidentate, tridentate, and quadridentate complexing agents; and (ii) an oxidizer, at a pH of between about 5 and 12. In many embodiments, the etching is substantially isotropic and occurs without visible formation of insoluble species on the surface of copper. The etching is useful in a number of processes in…
Conformal Films on Semiconductor Substrates
Granted: January 14, 2010
Application Number:
20100009533
A layer of diffusion barrier or seed material is deposited on a semiconductor substrate having a recessed feature. The method may include a series of new deposition cycles, for example, a first net deposition cycle and a second net deposition cycle. The first net deposition cycle includes depositing a first deposited amount of the diffusion barrier or seed material and etching a first etched amount of the diffusion barrier or seed material. The second net deposition cycle including…
ELECTROSTATIC CHUCK ASSEMBLY WITH CAPACITIVE SENSE FEATURE, AND RELATED OPERATING METHOD
Granted: January 14, 2010
Application Number:
20100008016
A semiconductor workpiece processing system for treating a workpiece, such as a semiconductor wafer, is provided. A related operating control method is also provided. The system includes an electrostatic chuck configured to receive a workpiece, and a clamping voltage power supply coupled to the electrostatic chuck. The electrostatic chuck has a clamping electrode assembly, and the clamping voltage power supply is coupled to the clamping electrode assembly. The clamping voltage power…
GAS-PURGED VACUUM VALVE
Granted: November 26, 2009
Application Number:
20090291207
A vacuum valve assembly for use in a vacuum processing chamber includes a seat defining an opening in the vacuum valve, with the seat having a sealing face adjacent the opening and normal to the direction of the opening; and a gate having a sealing face adapted to mate with the seat sealing face, the gate being movable toward and away from the seat sealing face to seal and open the vacuum valve opening. A continuous elastomeric seal extends around the vacuum valve opening between the…
Protective Layer To Enable Damage Free Gap Fill
Granted: November 19, 2009
Application Number:
20090286381
In-situ semiconductor process that can fill high aspect ratio (typically at least 6:1, for example 7:1 or higher), narrow width (typically sub 0.13 micron, for example 0.1 micron or less) gaps without damaging underlying features and little or no incidence of voids or weak spots is provided. A protective layer is deposited to protect underlying features in regions of the substrate having lower feature density so that unwanted material may be removed from regions of the substrate having…
Edge Profiling For Process Chamber Shields
Granted: November 19, 2009
Application Number:
20090283037
Process chamber shields having specially profiled edges exhibit increased lifetime in PVD and CVD deposition chambers. Edge profiling reduces flaking and delamination of materials deposited onto the shields, thereby prolonging shield life, and, consequently, reducing costs associated with deposition. In one embodiment, a shield having an edge portion terminating in a rounded tip, where the tip has high curvature and a small thickness, is provided. In another aspect, a shield having a…
Photoresist-free metal deposition
Granted: November 12, 2009
Application Number:
20090277801
Selectively accelerated or selectively inhibited metal deposition is performed to form metal structures of an electronic device. A desired pattern of an accelerator or of an inhibitor is applied to the substrate; for example, by stamping the substrate with a patterned stamp or spraying a solution using an inkjet printer. In other embodiments, a global layer of accelerator or inhibitor is applied to a substrate and selectively modified in a desired pattern. Thereafter, selective metal…
Pad-assisted electropolishing
Granted: November 12, 2009
Application Number:
20090277802
Pad-assisted electropolishing of the substrate is conducted by performing anodic dissolution of metal at a first portion of the substrate and simultaneously mechanically buffing a second portion of the substrate with a buffing pad. Anodic dissolution includes forming a thin liquid layer of electropolishing liquid between the anodic substrate and a cathodic electropolishing head. The location of electrical contacts between the substrate and power supply allow peripheral edge regions of…
Topography reduction and control by selective accelerator removal
Granted: November 12, 2009
Application Number:
20090277867
Plating accelerator is applied selectively to a substantially-unfilled wide (e.g., low-aspect-ratio feature cavity. Then, plating of metal is conducted to fill the wide feature cavity and to form an embossed structure in which the height of a wide-feature metal protrusion over the metal-filled wide-feature cavity is higher than the height of metal over field regions. Most of the overburden metal is removed using non-contact techniques, such as chemical wet etching. Metal above the wide…
Photoresist-free metal deposition
Granted: November 12, 2009
Application Number:
20090280243
Selectively accelerated or selectively inhibited metal deposition is performed to form metal structures of an electronic device. A desired pattern of an accelerator or of an inhibitor is applied to the substrate; for example, by stamping the substrate with a patterned stamp or spraying a solution using an inkjet printer. In other embodiments, a global layer of accelerator or inhibitor is applied to a substrate and selectively modified in a desired pattern. Thereafter, selective metal…
Topography reduction and control by selective accelerator removal
Granted: November 12, 2009
Application Number:
20090280649
Plating accelerator is applied selectively to a substantially-unfilled wide (e.g., low-aspect-ratio feature cavity. Then, plating of metal is conducted to fill the wide feature cavity and to form an embossed structure in which the height of a wide-feature metal protrusion over the metal-filled wide-feature cavity is higher than the height of metal over field regions. Most of the overburden metal is removed using non-contact techniques, such as chemical wet etching. Metal above the wide…
Photoresist Stripping Method and Apparatus
Granted: November 12, 2009
Application Number:
20090277472
The present invention pertains to methods for removing unwanted material from a work piece. More specifically, the invention pertains to stripping photoresist material from, e.g., a semiconductor wafer during semiconductor manufacturing. Methods involve implementing a pedestal for supporting a wafer, which pedestal has a low emissivity surface to reduce heat transfer by radiation.
Pad-assisted electropolishing
Granted: October 29, 2009
Application Number:
20090266707
Pad-assisted electropolishing of the substrate is conducted by performing anodic dissolution of metal at a first portion of the substrate and simultaneously mechanically buffing a second portion of the substrate with a buffing pad. Anodic dissolution includes forming a thin liquid layer of electropolishing liquid between the anodic substrate and a cathodic electropolishing head. The location of electrical contacts between the substrate and power supply allow peripheral edge regions of…
METHODS AND APPARATUSES FOR DETERMINING THICKNESS OF A CONDUCTIVE LAYER
Granted: October 22, 2009
Application Number:
20090263918
Methods and apparatuses are provided for calibrating eddy current sensors. A calibration curve is formed relating thickness of a conductive layer in a magnetic field to a value measured by the eddy current sensors or a value derived from such measurement, such as argument of impedance. The calibration curve may be an analytic function having infinite number terms, such as trigonometric, hyperbolic, and logarithmic, or a continuous plurality of functions, such as lines. Such curves can…
PLASMA GENERATOR SYSTEMS AND METHODS OF FORMING PLASMA
Granted: October 8, 2009
Application Number:
20090250334
Systems and methods of forming plasma are provided. In an embodiment, a plasma generator system is provided including a container, a single coil disposed around the container, the single coil being a single member and having a first end, a second end, a first winding, and a second winding, wherein the first winding extends from the first end, and the second winding is integrally formed as part of the first winding and extends to the second end, an energy source electrically coupled…
GAS FLOW DISTRIBUTION RECEPTACLES, PLASMA GENERATOR SYSTEMS, AND METHODS FOR PERFORMING PLASMA STRIPPING PROCESSES
Granted: September 24, 2009
Application Number:
20090236313
Systems, system components, and methods for plasma stripping are provided. In an embodiment, a gas flow distribution receptacle may have a rounded section that includes an inner surface defining a reception cavity, an outer surface forming an enclosed end, and a centerpoint on the outer surface having a longitudinal axis extending therethrough and through the reception cavity. First and second rings of openings provide flow communication with the plasma chamber. The second ring of…
