Novellus Systems Patent Grants

Boron-doped SIC copper diffusion barrier films

Granted: September 2, 2008
Patent Number: 7420275
Copper diffusion barrier films having a boron-doped silicon carbide layer with at least 25% boron by atomic weight of the layer composition have advantages for semiconductor device integration schemes. The films have an integration worthy etch selectivity to carbon doped oxide of at least 10 to 1, can adhere to copper with an adhesion energy of at least 20 J/m2, and can maintain an effective dielectric constant of less than 4.5 in the presence of atmospheric moisture. The films are…

Method of forming contact layers on substrates

Granted: August 26, 2008
Patent Number: 7416975
A method is provided for manufacturing removable contact structures on the surface of a substrate to conduct electricity from a contact member to the surface during electroprocessing. The method comprises forming a conductive layer on the surface. A predetermined region of the conductive layer is selectively coated by a contact layer so that the contact member touches the contact layer as the electroprocessing is performed on the conductive layer.

Adsorption based material removal process

Granted: August 26, 2008
Patent Number: 7416989
Methods for accurate and conformal removal of atomic layers of materials make use of the self-limiting nature of adsorption of at least one reactant on the substrate surface. In certain embodiments, a first reactant is introduced to the substrate in step (a) and is adsorbed on the substrate surface until the surface is partially or fully saturated. A second reactant is then added in step (b), reacting with the adsorbed layer of the first reactant to form an etchant. The amount of an…

Active rinse shield for electrofill chemical bath and method of use

Granted: August 19, 2008
Patent Number: 7413616
An active rinse shield designed to protect electrofill chemical baths from excessive dilution during rinse sprays on the semiconductor wafer. The shield uses overlapping blades to cover the bath, making a physical barrier between the bath chemistry and the wafer rinse water. The blades are interconnecting ribs that actuate around a common pivot axis. A linear mechanical actuator controls the blade movement, moving the top-most blade, which in turn, moves an adjacent lower blade. Each…

Plating by creating a differential between additives disposed on a surface portion and a cavity portion of a workpiece

Granted: July 29, 2008
Patent Number: 7404886
The present invention relates to methods for plating a conductive material on a substrate surface in a highly desirable manner. The invention removes at least one additive adsorbed on the top portion of the workpiece more than at least one additive disposed on a cavity portion, thereby allowing plating of the conductive material take place before the additive fully re-adsorbs onto the top portion and causing greater plating of the cavity portion relative to the top portion.

Methods for the electrochemical deposition of copper onto a barrier layer of a work piece

Granted: July 29, 2008
Patent Number: 7405157
Methods are provided for electrochemically depositing copper on a work piece. One method includes the step of depositing overlying the work piece a barrier layer having a surface and subjecting the barrier layer surface to a surface treatment adapted to facilitate deposition of copper on the barrier layer. Copper then is electrochemically deposited overlying the barrier layer.

Selectively accelerated plating of metal features

Granted: July 29, 2008
Patent Number: 7405163
An accelerator solution is globally applied to a workpiece to form an accelerator film, and then a portion of the accelerator film is selectively removed from the workpiece to form an acceleration region having a higher concentration of accelerator. The higher concentration of accelerator causes metal to deposit at a faster rate in the acceleration region than in a non-accelerated region for the duration of metal deposition. To make a metal feature, a resist layer is applied to a…

Carrier head for workpiece planarization/polishing

Granted: July 22, 2008
Patent Number: 7402098
An edge control system for deployment on a CMP carrier head comprising a bladder and a carrier head housing having a passage extending therethrough. The bladder includes a flexible diaphragm and is coupled to the carrier head housing. The edge control system comprises first and second annular ribs, each of which comprises a first end portion sealingly coupled to the carrier head housing, a second end portion coupled to the diaphragm, and a strain relief member substantially intermediate…

Long-life workpiece surface influencing device structure and manufacturing method

Granted: July 15, 2008
Patent Number: 7399516
A top layer comprises a flexible support and a plurality of hard elements anchored in a binder over the flexible support, and a method of forming the same is provided. In one embodiment, certain ones of the hard elements have a contact surface adapted to contact the conductive surface, with the binder being disposed below the contact surface of each of the certain ones of the hard elements. In another embodiment, the top layer comprises a flexible support, a plurality of hard elements…

Method for etching organic hardmasks

Granted: July 15, 2008
Patent Number: 7399712
A method of etching or removing an amorphous carbon organic hardmask overlying a low dielectric constant film in a lithographic process. The method includes providing a dielectric film having thereover an amorphous carbon organic hardmask to be removed, the dielectric film having a dielectric constant no greater than about 4.0, introducing over the amorphous carbon organic hardmask an ionizable gas comprising a mixture of hydrogen and an oxidizing gas, and applying energy to the mixture…

Protection of Cu damascene interconnects by formation of a self-aligned buffer layer

Granted: July 8, 2008
Patent Number: 7396759
Methods of protecting exposed metal damascene interconnect surfaces in a process for making electronic components and the electronic components made according to such methods. An integrated circuit structure having damascene regions with exposed metal surfaces is provided into a closed processing chamber, whereby a first reactant is contacted to the exposed metal surfaces to transform a top portion of the metal layer into a protective self-aligned buffer layer. Reacting molecules of the…

Methods for producing low-k CDO films with low residual stress

Granted: June 24, 2008
Patent Number: 7390537
Methods of preparing a carbon doped oxide (CDO) layer with a low dielectric constant and low residual stress are provided. The methods involve, for instance, providing a substrate to a deposition chamber and exposing it to a chemical precursor having molecules with at least one carbon-carbon triple bond, followed by igniting and maintaining a plasma in a deposition chamber using radio frequency power having high and low frequency components or one frequency component only, and depositing…

Methods for post etch cleans

Granted: June 24, 2008
Patent Number: 7390755
The current invention provides methods for performing a cleaning process that provides greater cleaning efficiency with less damage to device structures. After etching and photoresist stripping, a first plasma clean is performed. The first plasma clean may comprise one or more steps. Following the first plasma clean, a first HO based clean is performed. The first HO based clean may be a de-ionized water rinse, a water vapor clean, or a plasma clean, where the plasma includes hydrogen and…

Conductive contacts and methods for fabricating conductive contacts for elctrochemical planarization of a work piece

Granted: June 24, 2008
Patent Number: 7391086
Conductive contacts and methods for fabricating conductive contacts for electrochemical mechanical planarization are provided. A conductive contact in accordance with an exemplary embodiment of the invention includes, but is not limited to, a first conductive surface formed of a flexible material, a conductive element that is disposed remote from the first conductive surface and that is configured for electrical coupling to an external circuit, and an intermediate portion that…

Strain engineering—HDP thin film with tensile stress for FEOL and other applications

Granted: June 3, 2008
Patent Number: 7381451
High density plasma (HDP) techniques form high tensile stress silicon oxide films. The HDP techniques use low enough temperatures to deposit high tensile stress silicon oxide films in transistor architectures and fabrication processes effective for generating channel strain without adversely impacting transistor integrity. Methods involve a two phase process: a HDP deposition phase, wherein silanol groups are formed in the silicon oxide film, and a bond reconstruction phase, wherein…

Pulsed PECVD method for modulating hydrogen content in hard mask

Granted: June 3, 2008
Patent Number: 7381644
A method for forming a PECVD deposited ashable hardmask (AHM) with less than 30% H content at a process temperature below 500° C., e.g., about 400° C. produces low H content hard masks having the property of high selectivity of the hard mask film to the underlying layers for successful integration of the film, and are suitable for use with 193 nm generation and below lithography schemes wherein high selectivity of the hard mask to the underlying layers is required. The low temperature,…

Methods for improving the cracking resistance of low-k dielectric materials

Granted: June 3, 2008
Patent Number: 7381662
Methods for improving the mechanical properties of a CDO film are provided. The methods involve, for instance, providing either a dense CDO film or a porous CDO film in which the porogen has been removed followed by curing the CDO film at an elevated temperature using either a UV light treatment, an e-beam treatment, or a plasma treatment such that the curing improves the mechanical toughness of the CDO dielectric film.

Pad designs and structures for a versatile materials processing apparatus

Granted: May 27, 2008
Patent Number: 7378004
An apparatus capable of assisting in controlling an electrolyte flow and an electric field distribution used for processing a substrate is provided. It includes a rigid member having a top surface of a predetermined shape and a bottom surface. The rigid member contains a plurality of channels, each forming a passage from the top surface to the bottom surface, and each allowing the electrolyte and electric field flow therethrough. A pad is attached to the rigid member via a fastener. The…

Method of forming a damascene structure with integrated planar dielectric layers

Granted: April 22, 2008
Patent Number: 7361582
Methods are provided for forming a circuit component on a workpiece substrate. The methods comprise the steps of depositing a dielectric material over the substrate; etching a pattern through the dielectric material to expose a portion of the substrate; depositing a barrier metal over the dielectric material and the exposed portion of the substrate; depositing a conductive metal over the barrier metal, the deposited conductive metal having a thickness sufficient to fill the etched…

CMP apparatus and load cup mechanism

Granted: April 8, 2008
Patent Number: 7354335
In accordance with one embodiment of the invention, a load cup mechanism is provided for loading and unloading apparatus such as a CMP apparatus. The load cup mechanism, configured to load a work piece into and to unload a work piece from the apparatus, comprises a load cup arm configured to pivot about an axis between a load position aligned with the apparatus and an off-load position. A work piece platform is coupled to an end of the load cup arm and a plurality of lift fingers and a…