Data storage with real time dynamic clock frequency control
Granted: October 1, 2024
Patent Number:
12105574
The present disclosure generally relates to ensuring a data storage device consumes as little power as possible. Different HW modules in the data storage device can operate at different frequencies to ensure any bottleneck HW modules operate at as fast a frequency as possible, while non-bottleneck HW modules operate at slower frequencies and hence, consume less power. The frequency for each HW modules is dynamic and is adjusted based upon detected bottlenecks so that the data storage…
Virtual quality control interpolation and process feedback in the production of memory devices
Granted: October 1, 2024
Patent Number:
12105137
To provide more test data during the manufacture of non-volatile memories and other integrated circuits, machine learning is used to generate virtual test values. Virtual test results are interpolated for one set of tests for devices on which the test is not performed based on correlations with other sets of tests. In one example, machine learning determines a correlation study between bad block values determined at die sort and photo-limited yield (PLY) values determined inline during…
Three dimensional memory device and method of making thereof by forming channel and memory film after word line replacement
Granted: September 24, 2024
Patent Number:
12101936
A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, forming a sacrificial memory opening fill structure in the memory opening, replacing the sacrificial material layers with electrically conductive layers, removing the sacrificial memory opening fill structure selective to the electrically conductive layers, and…
Cryptographic keys for authorization requests from a data storage device
Granted: September 24, 2024
Patent Number:
12101418
Disclosed herein is a data storage device. A data port transmits data between a host computer system and the data storage device. A non-volatile storage medium stores encrypted user content data and a cryptography engine connected between the data port and the storage medium uses a cryptographic key to decrypt the encrypted user content data. The access controller generates a challenge for a manager device. The challenge comprises a blinded public key of an ephemeral unlock key pair that…
Non-volatile memory with suspension period during programming
Granted: September 24, 2024
Patent Number:
12100461
To remedy short term data retention issues, a system creates a gate to channel voltage differential for non-volatile memory cells between programming and verifying in order to accelerate the effects of the short term data retention issue. That is, the gate to channel voltage differential will accelerate the migrating of electrons out of shallow traps. In some embodiments, the gate to channel voltage differential comprises a higher voltage at the channel in comparison to the gate. In some…
Systems and methods of correcting errors in unmatched memory devices
Granted: September 24, 2024
Patent Number:
12100458
Systems and methods are provided for correcting errors in unmatched memory devices. Various embodiments herein train a memory interface to determine a duty cycle timing for a clock signal in a data window formed by a data signal in a memory cell. The duty cycle timing identifies an initial trained timing in the data window at which a setup portion and a hold portion of the data window are approximately equal in length when the trigger signal is received at the initial trained timing. The…
Management of host file-system defragmentation in a data storage device
Granted: September 24, 2024
Patent Number:
12099750
A data storage device having a flash translation layer configured to handle file-system defragmentation in a manner that avoids, reduces, and/or optimizes physical data movement in flash memory. In an example embodiment, the memory controller maintains in a volatile memory thereof a lookaside table that supplants pertinent portions of the logical-to-physical table. Entries of the lookaside table are configured to track source and destination addresses of the host defragmentation requests…
Non-volatile memory integrated with artificial intelligence system for preemptive block management
Granted: September 24, 2024
Patent Number:
12099743
A non-volatile storage apparatus comprises a plurality of memory cells that store host data and two models, a control circuit for writing to and reading from the memory cells, and an inference circuit. The inference circuit uses the first model with a first set of one or more metrics describing current operation of the non-volatile storage apparatus to make a first level prediction about defects and uses the second model with a second set of one or more metrics describing current…
Non-volatile memory with programmable resistance non-data word line
Granted: September 24, 2024
Patent Number:
12099728
In order to lower the peak and average current through the channel (thereby lowering peak and average power consumption) during program-verify, which exhibits a word line dependency, the inventors propose to program dummy memory cells connected to a dummy word line before programming data memory cells connected to a data word line. The additional resistance in the NAND string introduced by the preprogrammed dummy memory cells will cause the peak current, and power consumption, to be…
Semiconductor device containing bit lines separated by air gaps and methods for forming the same
Granted: September 17, 2024
Patent Number:
12096636
A semiconductor structure includes semiconductor devices located over a substrate, bit lines electrically connected to the semiconductor devices and having a respective reentrant vertical cross-sectional profile within a vertical plane that is perpendicular to a lengthwise direction along which the bit lines laterally extend, and dielectric portions that are interlaced with the bit lines along a horizontal direction that is perpendicular to the lengthwise direction. The dielectric…
Low line-sensitivity and process-portable reference voltage generator circuit
Granted: September 17, 2024
Patent Number:
12093069
Systems and methods are provided for generating a stable DC reference voltage that has low sensitivity to operating temperature and supply voltage variations and is stable across process corners using complimentary metal-on-semiconductor field-effect transistors (MOSFETS). In an example implementation, a reference voltage generator circuit is provided that includes complimentary MOSFETs including a first complimentary MOSFET connected to a first node and having a first threshold voltage,…
Three-dimensional memory device with multiple types of support pillar structures and method of forming the same
Granted: September 17, 2024
Patent Number:
12096632
Two types of support pillar structures are formed in a staircase region of an alternating stack of insulating layers and sacrificial material layers. First-type support pillar structures are formed in areas distal from backside trenches to be subsequently formed, and second-type support pillar structures may be formed in areas proximal to the backside trenches. The second-type support pillar structures may be formed as dielectric support pillar structures, or may be formed with at least…
Three-dimensional memory device including hammerhead-shaped word lines and methods of manufacturing the same
Granted: September 17, 2024
Patent Number:
12094943
A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical semiconductor channel, a memory film in contact with the vertical semiconductor channel, and a vertical stack of tubular dielectric spacers laterally surrounding the memory film. The tubular dielectric spacers may…
Fast search for leaky word line
Granted: September 17, 2024
Patent Number:
12094550
Technology is disclosed herein for detecting leaky word lines in a non-volatile storage system. The exact leaky word line may be located very rapidly using a divide and conquer approach. First a determination may be made whether at least one word line in a group such as any of the word lines in a block is leaky. This initial determination can be made very quickly. If no word line in the group is leaky, the search can end. However, responsive to a determination that at least one word line…
Non-volatile memory with zone based program speed adjustment
Granted: September 17, 2024
Patent Number:
12094546
In order to decrease the width of threshold voltage distributions of programmed memory cells without unreasonably increasing the time needed to complete programming, a non-volatile memory uses a zone based program speed adjustment. The non-volatile memory starts programming a first set of the non-volatile memory cells until a minimum number of memory cells of the first set of non-volatile memory cells reach a first threshold voltage. In response to the minimum number of memory cells…
Non-volatile memory with differential temperature compensation for super page programming
Granted: September 17, 2024
Patent Number:
12094537
A system has been described that performs differential temperature compensation based on a differential between the temperature at time of programming and temperature at time of reading for a set of data. Differential temperature compensation is useful for bulk programming/reading (e.g., many pages of data) and/or programming/reading super pages of data (multiple pages residing on different memory die).
Ultralow power inference engine with external magnetic field programming assistance
Granted: September 17, 2024
Patent Number:
12093812
An MRAM-based vector multiplication device, such as can be used for inferencing in a neural network, is presented that is ultralow power, low cost, and does not require special on-chip programming. A crosspoint array has an MRAM cell at each crosspoint junction and periphery array circuitry capable of supplying independent input voltages to each word line and reading current on each bit line. Vector multiplication is performed as an in-array multiplication of a vector of input voltages…
Hot-cold chunks soft-prediction during programming
Granted: September 17, 2024
Patent Number:
12093558
The present disclosure generally relates to estimating when data to be written will be read or re-written prior to actually writing the data to the memory device. The estimating can be used to smartly route the data to the appropriate memory location at the writing stage or to evict the data from a hot memory location to a colder memory location. To perform the estimating, typical traces or data may be used as may the metadata of the data. Separating data according to the data…
Data storage device and method for swap defragmentation
Granted: September 17, 2024
Patent Number:
12093537
A data storage device stores files in its memory. The files may be logically fragmented in that various parts of a given file may be located in non-continuous logical addresses, which can be disadvantageous. The host can send a request to the data storage device to reduce such logical fragmentation. For example, the host can send a swap command to the data storage device, in response to which the data storage device swaps the logical addresses of data fragments of two different files.…
Read look ahead optimization according to NVMe dataset management hints
Granted: September 17, 2024
Patent Number:
12093130
A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive a dataset management (DSM) hint, determine if a second physical memory range associated with a next read operation is located within a threshold number of physical block addresses (PBAs) to a first physical memory range associated with a current read operation, where the next read operation is provided by the DSM hint, and utilize at least a portion of a…
