Synopsys Profile

Synopsys Patent Grants

Thread switching in microprocessor without full save and restore of register file

Patent Number 10318302 - June 11, 2019

Certain embodiments of the present disclosure support a method and apparatus for efficient multithreading on a single core microprocessor.…

Network flow based framework for clock tree optimization

Patent Number 10318684 - June 11, 2019

Systems and techniques for clock tree optimization are described. An electronic design automation (EDA) tool can receive a graph that…

Management of placement constraint regions in an electronic design automation (EDA) system

Patent Number 10318685 - June 11, 2019

A method of establishing regions for placing cells of an integrated circuit (IC) includes, in part, assigning a precedence value to each of a…

Partitioning using a correlation meta-heuristic

Patent Number 10318690 - June 11, 2019

A method for partitioning for a hypergraph including a plurality of nodes into a plurality of bins includes assigning each node of the…

Sub-resolution assist feature implementation for shot generation

Patent Number 10318697 - June 11, 2019

A design layout for a semiconductor chip includes information on shapes desired to be fabricated. Clusters of photolithographic exposure…

Synopsys Patent Applications

Atomic Scale Grid for Modeling Semiconductor Structures and Fabrication Processes

Application Number 20190147123 - May 16, 2019

Roughly described, a system for simulating a temporal process in a body includes a meshing module to impose a grid of nodes on the body, the…

Heterojunction Field Effect Transistor Device with Serially Connected Enhancement Mode and Depletion Mode Gate Regions

Application Number 20190148371 - May 16, 2019

Roughly described, a heterojunction field effect transistor device includes a first piezoelectric layer supporting a channel region, a second…

Mitigating Write Disturbance in Dual Port 8T SRAM

Application Number 20190130965 - May 2, 2019

The independent claims of this patent signify a concise description of embodiments. Disclosed is technology for reducing write disturbance…

INTEGRATED METAL LAYER AWARE OPTIMIZATION OF INTEGRATED CIRCUIT DESIGNS

Application Number 20190065656 - February 28, 2019

Systems and techniques are described for optimizing an integrated circuit (IC) design. Before routing is performed on the IC design in an IC…

Finfet with Heterojunction and Improved Channel Control

Application Number 20190043987 - February 7, 2019

Roughly described, a computer program product describes a transistor with a fin, a fin support, a gate, and a gate dielectric. The fin…

Synopsys Federal Litigation Filings

Synopsys, Inc. v. InnoGrit, Corp.

California Northern District Court - April 23, 2019

Synopsys, Inc. v. Fortinet, Inc.

California Northern District Court - February 15, 2019

Synopsys, Inc. v. Gyrfalcon Technology Inc.

California Northern District Court - October 17, 2018

UPF Innovations, LLC v. Synopsys, Inc.

Texas Eastern District Court - May 10, 2018

Synopsys Federal District Court Decisions

Synopsys, Inc. v. Ubiquiti Networks, Inc. et al

California Northern District Court - May 21, 2018

ORDER by Judge Laurel Beeler adjudicating 198 Discovery Letter Brief.As set forth in the attached order, the court declines to order…

Synopsys, Inc. v. Ubiquiti Networks, Inc. et al

California Northern District Court - November 8, 2017

ORDER granting 90 STIPULATION to continue hearing as to 79 MOTION to Dismiss, 80 MOTION to Strike, and 77 MOTION for Leave to File…

Synopsys, Inc. v. Atoptech, Inc

California Northern District Court - January 12, 2017

ORDER DIRECTING DEFENDANT TO SUBMIT CHAMBERS COPY OF DOCUMENTS IN COMPLIANCE WITH CIVIL LOCAL RULES AND COURT'S STANDING ORDERS. Signed…

Synopsys, Inc. v. Atoptech, Inc

California Northern District Court - December 19, 2016

PERMANENT INJUNCTION AND DISPOSITION ORDER. Signed by Judge Maxine M. Chesney on 12/19/16. (Attachments: # 1 Appendix Part One, # 2 Appendix…

Synopsys, Inc. v. Atoptech, Inc

California Northern District Court - November 16, 2016

ORDER by Magistrate Judge Donna M. Ryu re 811 Joint Discovery Letter Brief Regarding Synopsys' Second Set of Interrogatories. (dmrlc2,…

Synopsys State Court Decisions

SYNOPSYS, INC. v. ATOPTECH, INC.

United States US Court of Appeals, Federal Circuit - May 5, 2017

SYNOPSYS, INC. v. ATOPTECH, INC.

United States US Court of Appeals, Federal Circuit - April 24, 2017

Synopsys, Inc. v. Atoptech, Inc

California California Northern District Court - October 24, 2016

MEMORANDUM OF DECISION; FINDINGS OF FACT AND CONCLUSIONS OF LAW. For the reasons set forth in the Memorandum of Decision, the Court finds in…

SYNOPSYS, INC. v. MENTOR GRAPHICS CORPORATION

United States U.S. Court of Appeals, Federal Circuit - October 17, 2016

SYNOPSYS, INC. v. MENTOR GRAPHICS CORPORATION

United States U.S. Court of Appeals, Federal Circuit - October 11, 2016

Synopsys Federal Appellate Court Decisions

SYNOPSYS, INC. v. ATOPTECH, INC.

US Court of Appeals for the Federal Circuit - May 5, 2017

SYNOPSYS, INC. v. ATOPTECH, INC.

US Court of Appeals for the Federal Circuit - April 24, 2017

SYNOPSYS, INC. v. MENTOR GRAPHICS CORPORATION

U.S. Court of Appeals for the Federal Circuit - October 17, 2016

SYNOPSYS, INC. v. MENTOR GRAPHICS CORPORATION

U.S. Court of Appeals for the Federal Circuit - October 11, 2016

SYNOPSYS, INC. v. MENTOR GRAPHICS CORPORATION

U.S. Court of Appeals for the Federal Circuit - February 10, 2016