Correcting 3D Effects In Phase Shifting Masks Using Sub-Resolution Features
Granted: July 12, 2007
Application Number:
20070160917
Using phase shifting on a mask can advantageously improve printed feature resolution on a wafer, thereby allowing greater feature density on an integrated circuit. Phase shifting can create an intensity imbalance between 0 degree and 180 degree phase shifters on the mask. An improved method of designing an alternating PSM to minimize this intensity imbalance is provided. Sub-resolution features, called “blockers”, can be incorporated in the alternating PSM design. Specifically,…
Integrated Circuit On Corrugated Substrate
Granted: June 14, 2007
Application Number:
20070132053
By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not…
SPICE optimized for arrays
Granted: June 14, 2007
Application Number:
20070133245
A memory array can be optimized for SPICE simulation by modeling the memory array as a collection of boundary elements that track the cell states of memory cells connected to a particular array terminal. By maintaining a cell state distribution for each boundary element, the simulation behavior at the array terminal associated with that boundary element can be accurately determined by modeling each unique cell state, multiplying the results by the corresponding quantities from the cell…
Enhanced Segmented Channel MOS Transistor with Narrowed Base Regions
Granted: June 7, 2007
Application Number:
20070128782
By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not…
Approximating wafer intensity change to provide fast mask defect scoring
Granted: June 7, 2007
Application Number:
20070130557
To provide fast mask defect scoring, approximated wafer simulations (e.g. using one convolution) are performed on the defect inspection image and its corresponding reference inspection image. Using the approximated defect wafer image and the approximated reference wafer image generated by these approximated wafer simulations, a defect maximum intensity difference (MID) is computed by subtracting one approximated wafer image from the other approximated wafer image to generate a difference…
Enhanced Segmented Channel MOS Transistor with Multi Layer Regions
Granted: May 31, 2007
Application Number:
20070120156
By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not…
Engineered barrier layer and gate gap for transistors with negative differential resistance
Granted: May 31, 2007
Application Number:
20070120186
A negative differential resistance (NDR) transistor includes a gate stack formed from a gate, a barrier layer, and a dielectric layer formed between the gate and barrier layer. To enable the NDR characteristic of the transistor, the barrier layer is configured to dynamically transfer charge carriers to and from the channel region of the transistor (e.g., to a charge storage node between the barrier layer and the dielectric layer), thereby adjusting the threshold voltage of the…
Enhanced Segmented Channel MOS Transistor with High-Permittivity Dielectric Isolation Material
Granted: May 31, 2007
Application Number:
20070122953
By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not…
Sequential Selective Epitaxial Growth
Granted: May 31, 2007
Application Number:
20070122954
By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not…
Method and apparatus for synthesis of multimode X-tolerant compressor
Granted: May 17, 2007
Application Number:
20070113128
Methods and apparatuses for synthesizing a multimode x-tolerant compressor are described.
METHOD FOR SIMULATING THE MOVEMENT OF PARTICLES
Granted: April 19, 2007
Application Number:
20070087552
A method for determining the movement of particles, particularly impurities, in a medium, under the influence of a changing interface between two neighboring phases. In a first step, the temporal and/or local evolution of said interface is determined. In a second step, the movement of said particles in dependence of the temporal and/or local evolution of the phase interface as determined in the first step is calculated. Optionally, the distribution of the particles within the medium at a…
Shape-Based Geometry Engine To Perform Smoothing And Other Layout Beautification Operations
Granted: April 19, 2007
Application Number:
20070089073
A shape-based layout beautification operation can be performed on an IC layout to correct layout imperfections. A shape is described by edges (and vertices) related according to specified properties. Each shape can be configured to match specific layout imperfection types. Corrective actions can then be associated with the shapes, advantageously enabling efficient formulation and precise application of those corrective actions. Corrective actions can include absolute, adaptive, or…
Leakage power management with NDR isolation devices
Granted: April 12, 2007
Application Number:
20070081378
A method and system for minimizing sub-threshold leakage in a logic block is disclosed An NDR isolation device is coupled between the logic block and ground to form a virtual ground node. To put the logic block into sleep mode, the virtual ground control device raises the voltage at the virtual ground node above an isolation voltage, which causes NDR isolation device isolates the virtual ground node from ground. The virtual ground control device can then raise the voltage at the virtual…
Notched trim mask for phase shifting mask
Granted: April 12, 2007
Application Number:
20070082276
A phase shifting mask (PSM) and a trim mask can be used in a dual exposure to form circuits on an integrated circuit. The trim mask can include first structures that define non-critical features of a design (e.g. line ends), second structures that protect areas exposed by phase shifters, wherein such areas including critical features (e.g. transistor gates) of the design, and transitional areas located between the first and second structures. Notably, these transitional areas can include…
Generating a base curve database to reduce storage cost
Granted: April 12, 2007
Application Number:
20070083838
An enhanced library accessible by an EDA tool can include a base curve database and a plurality of curve data sets. Each curve data set refers to a standard cell having certain timing characteristics. To determine those timing characteristics, each curve data set identifies at least one base curve (in the base curve database) as well as a starting current, a peak current, a peak voltage, and a peak time. In one embodiment, each base curve can be normalized. The base curve(s), the…
Method for symbolic simulation of circuits having non-digital node voltages
Granted: April 5, 2007
Application Number:
20070078638
In a computer simulation of an analog device in a digital circuit, a piece-wise linear lookup table is used to determine the channel resistance of the transistors in the analog device, allowing the node voltages to take on non-digital values. The piece-wise linear lookup table contains a set of channel resistances corresponding respectively to gate-to-source voltages. The program uses multi-terminal binary decision graphs (MTBDDs) to represent non-digital resistances, capacitances and…
USB 2.0 FS/LS mode driver
Granted: March 22, 2007
Application Number:
20070064778
A USB 2.0 transceiver includes a legacy full speed and low speed (FS/LS) USB driver that includes multiple output stages. The multiple output stages are connected in parallel to an output terminal. By sequentially providing the USB data to the multiple output stages, the USB signal at the output terminal will transition between logic states in an incremental fashion as the multiple output stages sequentially switch their individual output states. Consequently, the rise/fall time for the…
Reference Image Generation From Subject Image For Photolithography Mask Analysis
Granted: March 15, 2007
Application Number:
20070058852
A reference image is generated from a subject image of at least a portion of a photolithography mask to enable a photolithography mask inspection and analysis system that otherwise cannot generate a reference image from a reference die or digitized design data, for example, to perform a mask analysis using the reference image. A mask inspection and analysis system may then be enhanced to perform one or more additional mask analyses to analyze the mask. The reference image is generated by…
USB 2.0 HS voltage-mode transmitter with tuned termination resistance
Granted: February 1, 2007
Application Number:
20070024327
A high-speed universal serial bus (USB) transceiver includes a voltage-mode architecture for generating a USB signal. The voltage mode architecture reduces power consumption by reducing the current requirements for high-speed USB communications. The USB transceiver can include a reference voltage generator, a resistive element, and a switching element for completing and breaking a circuit including the reference voltage generator, the resistive element, and a data pin of a USB port to…
Automation method and system for assessing timing based on Gaussian slack
Granted: January 18, 2007
Application Number:
20070016881
An automated design process using a computer system includes identifying a set of timing endpoints in a circuit defined by a machine-readable file. Values of slack in the estimated arrival times for the timing endpoints are assigned. Probability distribution functions, such as Gaussian distributions, are assigned for the respective values of slack, and are combined. The combination of probability distribution functions represents a measure of circuit performance. The measure is computed…
