PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES
Granted: April 17, 2025
Application Number:
20250125201
Package substrates with components included in cavities of glass cores are disclosed. An example apparatus includes: a glass core having a first through-hole and a second through-hole, the first through-hole spaced apart from and smaller than the second through-hole; and a conductive material within the first through-hole, the conductive material to extend a full length of the first through-hole. The example apparatus further includes a dielectric material within the second through-hole,…
PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES
Granted: April 17, 2025
Application Number:
20250126814
Package substrates with components included in cavities of glass cores are disclosed. An example apparatus includes: a glass layer having a first hole and a second hole, the second hole larger than an electronic component disposed therein, a width of the electronic component larger than a width of the first hole. The example apparatus further includes a conductive material that substantially fills the first hole; and a dielectric material that substantially fills a space within the…
DETERMINING ADAPTIVE QUANTIZATION MATRICES USING MACHINE LEARNING FOR VIDEO CODING
Granted: April 17, 2025
Application Number:
20250126261
Techniques related to adaptive quantization matrix selection using machine learning for video coding are discussed. Such techniques include applying a machine learning model to generate an estimated quantization parameter for a frame and selecting a set of quantization matrices for encode of the frame from a number of sets of quantization matrices based on the estimated quantization parameter.
INTEGRITY PROTECTED COMMAND BUFFER EXECUTION
Granted: April 17, 2025
Application Number:
20250125966
Embodiments are directed to providing integrity-protected command buffer execution. An embodiment of an apparatus includes a computer-readable memory comprising one or more command buffers and a processing device communicatively coupled to the computer-readable memory to read, from a command buffer of the computer-readable memory, a first command received from a host device, the first command executable by one or more processing elements on the processing device, the first command…
SECURING AUDIO COMMUNICATIONS
Granted: April 17, 2025
Application Number:
20250125944
Systems and methods include establishing a cryptographically secure communication between an application module and an audio module. The application module is configured to execute on an information-handling machine, and the audio module is coupled to the information-handling machine. The establishment of the cryptographically secure communication may be at least partially facilitated by a mutually trusted module.
NETWORK ALLOCATION VECTOR TIMEOUT FOR ULTRA HIGH RELIABILITY INITIAL CONTROL FRAME EXCHANGE
Granted: April 17, 2025
Application Number:
20250125839
This disclosure describes systems, methods, and devices related to NAV timeout. A device may transmit, during a transmission opportunity (TxOP), an initial control frame (ICF) trigger frame including user information fields identifying one or more target stations (STAs). The device may receive from the one or more target STAs, an initial control response (ICR) frame, wherein the ICR frame includes feedback information and padding. The device may calculate a network allocation vector…
MICROELECTRONIC ASSEMBLIES INCLUDING INTERCONNECTS WITH DIFFERENT SOLDER MATERIALS
Granted: April 17, 2025
Application Number:
20250125307
Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first die, having a first surface and an opposing second surface, in a first layer; a redistribution layer (RDL) on the first layer, wherein the RDL includes conductive vias having a greater width towards a first surface of the RDL and a smaller width towards an opposing second surface of the RDL; wherein the first surface of the RDL is electrically…
STACKED VIAS WITH BOTTOM PORTIONS FORMED USING SELECTIVE GROWTH
Granted: April 17, 2025
Application Number:
20250125255
Disclosed herein are methods for fabricating IC structures that include stacked vias providing electrical connectivity between metal lines of different layers of a metallization stack, as well as resulting IC structures. An example IC structure includes a first and a second metallization layers, including, respectively, a bottom metal line and a top metal line. The IC structure further includes a via that has a bottom via portion and a top via portion, where the top via portion is…
VIA PLUG RESISTOR
Granted: April 17, 2025
Application Number:
20250125242
Disclosed herein are via plug resistors for incorporation into electronic substrates, and related methods and devices. Exemplary via plug resistor structures include a resistive element within and on a surface of a via extending at least partially through an electronic substrate and first and second electrodes coupled to the resistive element.
PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES
Granted: April 17, 2025
Application Number:
20250125202
Package substrates with components included in cavities of glass cores are disclosed. An example apparatus includes: a glass layer having an opening between opposing first and second surfaces of the glass layer; an electronic component within the opening; a dielectric material within the opening between the electronic component and a sidewall of the opening; and a through-glass via including a conductive material that extends through the glass layer.
METHODS AND APPARATUS TO UTILIZE LARGE LANGUAGE ARTIFICIAL INTELLIGENCE MODELS TO CONVERT COMPUTER CODE
Granted: April 17, 2025
Application Number:
20250123819
Systems, apparatus, articles of manufacture, and methods are disclosed to utilize large language artificial intelligence models to convert computer code. An example apparatus includes instructions and processor circuitry to execute the instructions to at least: train a large language model based on a computer instructions repository that includes code of a first type; utilize the large language model to convert an input set of instructions of the first type into output code of a second…
HEAD POSE ESTIMATION IN COMPUTER VISION
Granted: April 17, 2025
Application Number:
20250124596
Systems, apparatus, articles of manufacture, and methods are disclosed to estimate a pose of a head of a user of an electronic device. An example apparatus to estimate a head pose includes at least one processor circuit to be programmed by instructions to: identify a plurality of facial landmarks in a plurality of images; identify initial image data based on the plurality of facial landmarks; augment the initial image data with a transformation operation; and train a neural network based…
METHODS, SYSTEMS, ARTICLES OF MANUFACTURE AND APPARATUS TO MAP WORKLOADS
Granted: April 17, 2025
Application Number:
20250124271
Methods, apparatus, systems and articles of manufacture are disclosed to map workloads. An example apparatus includes a constraint definer to define performance characteristic targets of the neural network, an action determiner to apply a first resource configuration to candidate resources corresponding to the neural network, a reward determiner to calculate a results metric based on (a) resource performance metrics and (b) the performance characteristic targets, and a layer map…
DEEP NEURAL NETWORK ARCHITECTURE USING PIECEWISE LINEAR APPROXIMATION
Granted: April 17, 2025
Application Number:
20250124266
In one embodiment, an apparatus comprises a log circuit to: identify an input associated with a logarithm operation, wherein the logarithm operation is to be performed by the log circuit using piecewise linear approximation; identify a first range that the input falls within, wherein the first range is identified from a plurality of ranges associated with a plurality of piecewise linear approximation (PLA) equations for the logarithm operation, and wherein the first range corresponds to…
SECURE REAL TIME VOICE ANONYMIZATION AND RECOVERY
Granted: April 17, 2025
Application Number:
20250124171
Voice anonymization systems and methods are provided. Voice anonymization is done on the speaker's computing device and can prevent voice theft. The voice anonymization systems and methods are lightweight and run efficiently in real time on a computing device, allowing for speaker anonymity without diminishing system performance during a teleconference or VoIP meeting. The anonymization system outputs a transformed speaker voice. The anonymization system can also generate a voice…
EFFICIENT TOKEN PRUNING IN TRANSFORMER-BASED NEURAL NETWORKS
Granted: April 17, 2025
Application Number:
20250124105
Key-value (KV) caching accelerates inference in large language models (LLMs) by allowing the attention operation to scale linearly rather than quadratically with the total sequence length. Due to large context lengths in modern LLMs, KV cache size can exceed the model size, which can negatively impact throughput. To address this issue, KVCrush, which stands for KEY-VALUE CACHE SIZE REDUCTION USING SIMILARITY IN HEAD-BEHAVIOR, is implemented. KVCrush involves using binary vectors to…
METHODS, APPARATUS, AND ARTICLES OF MANUFACTURE TO DYNAMICALLY MANAGE INPUT/OUTPUT TRANSACTIONS
Granted: April 17, 2025
Application Number:
20250123979
Systems, apparatus, articles of manufacture, and methods are disclosed to dynamically manage input/output (I/O) transactions. An example apparatus includes circuitry to determine at least one of a first parameter assigned to an VO transaction by a user, a second parameter for the I/O transaction based on at least a class of an I/O device, or a third parameter for the I/O transaction based on a usage pattern for a compute device coupled to the I/O device. Additionally, the example…
PROGRAMMABLE WRITE FILTER HARDWARE
Granted: April 17, 2025
Application Number:
20250123955
Write filter hardware is provided with circuitry to receive a signal to switch the write filter from a disabled state to an enabled state for a given range of addresses in a shared memory. A write attempt by a host processor to the range of addresses is identified, where access to the shared memory is shared with an accelerator device. The write filter hardware causes the write attempt to be dropped when the hardware write filter is in the enabled state for the given range of addresses.
SYSTEMS, APPARATUS, AND METHODS FOR ENERGY HARVESTING IN DATA CENTERS
Granted: April 17, 2025
Application Number:
20250123887
Systems, apparatus, and methods for energy harvesting in data centers are disclosed. An example apparatus includes interface circuitry; machine-readable instructions; and at least one processor circuit to at least one of instantiate or execute the machine-readable instructions to estimate first power consumption values for electronic components of a first rack; estimate second power consumption values for electronic components of a second rack; determine a first selection score for the…
MULTI-VARIATE STRIDED READ OPERATIONS FOR ACCESSING MATRIX OPERANDS
Granted: April 17, 2025
Application Number:
20250123843
In one embodiment, a matrix processor comprises a memory to store a matrix operand and a strided read sequence, wherein: the matrix operand is stored out of order in the memory; and the strided read sequence comprises a sequence of read operations to read the matrix operand in a correct order from the memory. The matrix processor further comprises circuitry to: receive a first instruction to be executed by the matrix processor, wherein the first instruction is to instruct the matrix…
