Intel Patent Grants

Forming an oxide volume within a fin

Granted: February 11, 2025
Patent Number: 12224202
Embodiments of the present disclosure may generally relate to systems, apparatus, and/or processes to form volumes of oxide within a fin, such as a Si fin. In embodiments, this may be accomplished by applying a catalytic oxidant material on a side of a fin and then annealing to form a volume of oxide. In embodiments, this may be accomplished by using a plasma implant technique or a beam-line implant technique to introduce oxygen ions into an area of the fin and then annealing to form a…

Dual metal silicide structures for advanced integrated circuit structure fabrication

Granted: February 11, 2025
Patent Number: 12225740
Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a P-type semiconductor device above a substrate and including first and second semiconductor source or drain regions adjacent first and second sides of a first gate electrode. A first metal silicide layer is…

Channel access enhancements for ultra-reliable low-latency communication (URLLC) in unlicensed spectrum

Granted: February 11, 2025
Patent Number: 12225582
Embodiments of a user equipment (UE) configurable for unlicensed band operation in a 5G NR system (5GS), when operating in semi-static channel access mode, for a UE-initiated channel-occupancy time (COT), is configured to transmit an uplink (UL) transmission burst, as an initiating device, starting at a beginning of fixed frame period (FFP) and ending at a symbol before an idle period of the FFP after a successful clear-channel assessment (CCA).

Enhanced high efficiency frames for wireless communications

Granted: February 11, 2025
Patent Number: 12225514
This disclosure describes systems, methods, and devices related to using enhanced high efficiency (HE) frames. A device may determine a high efficiency signal-B (HE-SIG-B) field for a high efficiency (HE) frame, the HE-SIG-B field comprising a common information field and a user information field. The device may determine a data portion of the HE frame, wherein the data portion includes one or more resource units (RUs) with a size equal to a number of tones. The device may determine a…

Methods and apparatus to mitigate coexistence interference in a wireless network

Granted: February 11, 2025
Patent Number: 12225391
Methods and apparatus to mitigate coexistence interference in a wireless network are disclosed. An example apparatus includes a station component interface to receive an expected transmission power from an access point; an index processor to determine a set of preferred resource unit (RU) indexes from a set of available RU indexes for at least one of (A) uplink transmission to the access point based on a comparison of allowable transmission power and the expected transmission power or…

Data offload and time synchronization for ubiquitous visual computing witness

Granted: February 11, 2025
Patent Number: 12225131
In one embodiment, a road side unit (RSU) establishes a data offload session with a vehicle in the vicinity of the RSU based on a session establishment request sent by the vehicle, and stores data received from the vehicle during the data offload session in its memory. The RSU generates storage record information (including identifying information for the RSU) for the stored data, and transmits the storage record information to the vehicle.

Selective congestion notification by a network interface device

Granted: February 11, 2025
Patent Number: 12224940
Examples described herein relate to a switch, when operational, that is configured to receive in a packet an indicator of number of remaining bytes in a flow and to selectively send a congestion message based on a fullness level of a buffer and indication of remainder of the flow. In some examples, the indicator is received in an Internet Protocol version 4 consistent Options header field or Internet Protocol version 6 consistent Flow label field. In some examples, the congestion message…

Self-aligned gate endcap (SAGE) architectures with gate-all-around devices

Granted: February 11, 2025
Patent Number: 12224350
Self-aligned gate endcap (SAGE) architectures with gate-all-around devices, and methods of fabricating self-aligned gate endcap (SAGE) architectures with gate-all-around devices, are described. In an example, an integrated circuit structure includes a semiconductor fin above a substrate and having a length in a first direction. A nanowire is over the semiconductor fin. A gate structure is over the nanowire and the semiconductor fin, the gate structure having a first end opposite a second…

Self-aligned gate endcap (SAGE) architectures with vertical sidewalls

Granted: February 11, 2025
Patent Number: 12224349
Self-aligned gate endcap (SAGE) architectures with vertical sidewalls, and methods of fabricating self-aligned gate endcap (SAGE) architectures with vertical sidewalls, are described. In an example, an integrated circuit structure includes a semiconductor fin having sidewalls along a length of the semiconductor fin, each sidewall tapering outwardly from a top of the semiconductor fin toward a bottom of the semiconductor fin. A gate endcap isolation structure is spaced apart from the…

Magnetic core inductors in interposer

Granted: February 11, 2025
Patent Number: 12224252
Embodiments disclosed herein include coreless interposers with embedded inductors. In an embodiment, a coreless interposer comprises a plurality of buildup layers, where electrical routing is provided in the plurality of buildup layers. In an embodiment, the coreless interposer further comprises an inductor embedded in the plurality of buildup layers. In an embodiment, the inductor comprises a magnetic shell, and a conductive lining over an interior surface of the magnetic shell.

Methods and apparatus to perform a pseudo-S3 protocol to update firmware and/or activate new firmware with a warm reset

Granted: February 11, 2025
Patent Number: 12223308
Methods, apparatus, systems, and articles of manufacture to perform a pseudo-S3 protocol to update firmware and/or activate new firmware with a warm reset are disclosed. An example apparatus includes an advanced configuration and power interface (ACPI) to: initiate a pseudo-sleep event in response to identifying a firmware update; and assert a power button event, the power button event to cause an operating system (OS) to prepare to enter into a sleep state; a basic input/output system…

Angled inductor with small form factor

Granted: February 11, 2025
Patent Number: 12224103
An electronic substrate may be fabricated having a dielectric material, metal pads embedded in the dielectric material with co-planar surfaces spaced less than one tenth millimeter from each other, and a metal trace embedded in the dielectric material and attached between the metal pads, wherein a surface of the metal trace is non-co-planar with the co-planar surfaces of the metal pads at a height of less than one millimeter, and wherein sides of the metal trace are angled relative to…

Cache processes with adaptive dynamic start voltage calculation for memory devices

Granted: February 11, 2025
Patent Number: 12224019
A method, a memory chip controller of a flash memory device, and a flash memory device. The memory chip controller includes processing circuitry to receive data for a first page of N pages of data; and program cells of a memory location of the device to an nth threshold voltage level Ln, Ln corresponding to a program verify voltage level PVn, n being an integer from 0 to 2N?1, and Ln being one of 2N threshold voltage levels achievable using the N pages of data. Programming the cells…

Staggered active bitline sensing

Granted: February 11, 2025
Patent Number: 12224015
Systems, apparatuses and methods may provide for technology that applies a first set of control signals to even bitlines in NAND memory and senses voltage levels of the even bitlines during an even sensing time period. The technology may also apply a second set of control signals to odd bitlines in the NAND memory, and sense voltage levels of the odd bitlines during an odd sensing time period, wherein the second set of control signals are applied after expiration of a stagger time period…

Methods and apparatus for acoustic noise mitigation of electronic noise using adaptive sensing and control

Granted: February 11, 2025
Patent Number: 12223937
Methods, apparatus, systems and articles of manufacture for acoustic system noise mitigation are disclosed. An example apparatus includes a sound sensor and one or more electronic components. The apparatus also includes a background noise analyzer to obtain sensor data indicative of background noise in an environment of the apparatus from the sound sensor. The apparatus also includes a system noise analyzer to select a first system noise profile indicative of acoustic noise associated…

Methods and arrangements for sensors

Granted: February 11, 2025
Patent Number: 12223822
Example methods and arrangements for sensors are disclosed herein. At least one storage device or storage disk includes instructions that, when executed, cause at least one processor of a mobile electronic device to at least access notification data indicative of an event at a security perimeter of a building, the notification data corresponding to a change in a status of one or more sensors at the security perimeter; present the notification data to a user of the mobile electronic…

Variable width interleaved coding for graphics processing

Granted: February 11, 2025
Patent Number: 12223682
Variable width interleaved coding for graphics processing is described. An example of an apparatus includes one or more processors including a graphic processor; and memory for storage of data including data for graphics processing, wherein the graphics processor includes an encoder pipeline to provide variable width interleaved coding and a decoder pipeline to decode the variable width interleaved coding, and wherein the encoder pipeline is to receive a plurality of bitstreams from…

Apparatus and method for approximate trilinear interpolation for scene reconstruction

Granted: February 11, 2025
Patent Number: 12223615
A method comprising: dividing a 3D space into a voxel grid comprising a plurality of voxels; associating a plurality of distance values with the plurality of voxels, each distance value based on a distance to a boundary of an object; selecting an approximate interpolation mode for stepping a ray through a first one or more voxels of the 3D space responsive to the first one or more voxels having distance values greater than a threshold; and detecting the ray reaching a second one or more…

Apparatus and method for quantized convergent direction-based ray sorting

Granted: February 11, 2025
Patent Number: 12223585
Apparatus and method for grouping rays based on quantized ray directions. For example, one embodiment of an apparatus comprises: An apparatus comprising: a ray generator to generate a plurality of rays; ray direction evaluation circuitry/logic to generate approximate ray direction data for each of the plurality of rays; ray sorting circuitry/logic to sort the rays into a plurality of ray queues based, at least in part, on the approximate ray direction data.

Separately processing regions or objects of interest from a render engine to a display engine or a display panel

Granted: February 11, 2025
Patent Number: 12223572
Video or graphics, received by a render engine within a graphics processing unit, may be segmented into a region of interest such as foreground and a region of less interest such as background. In other embodiments, an object of interest may be segmented from the rest of the depiction in a case of a video game or graphics processing workload. Each of the segmented portions of a frame may themselves make up a separate surface which is sent separately from the render engine to the display…